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ESDAVLC6-1V2 Datasheet(PDF) 6 Page - STMicroelectronics

Part # ESDAVLC6-1V2
Description  Single line low capacitance Transil™ for ESD protection
PDF  8 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ESDAVLC6-1V2 Datasheet(HTML) 6 Page - STMicroelectronics

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Recommendation on PCB assembly
ESDAVLC6-1V2
6/8
DocID025241 Rev 1
3.3
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3.
Tolerance of ± 0.02 mm is recommended.
4.
1.0 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
3.4
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
3.5
Reflow profile
Figure 9. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Note:
Minimize air convection currents in the reflow oven to avoid component movement.
250
0
50
100
150
200
240
210
180
150
120
90
60
30
300
270
-6 °C/s
240-245 °C
2 - 3 °C/s
Temperature (°C)
-2 °C/s
-3 °C/s
Time (s)
0.9 °C/s
60 sec
(90 max)



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