P30NS15LFP datasheet(1/9 Pages) STMICROELECTRONICS

Part #	P30NS15LFP

Description	N-CHANNEL 150V - 0.085 W - 10A TO-220FP MESH OVERLAY??POWER MOSFET

PDF	9 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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July 2003

.

STP30NS15LFP

N-CHANNEL 150V - 0.085

Ω - 10A TO-220FP

MESH OVERLAY™ POWER MOSFET

s

TYPICAL RDS(on) = 0.085Ω

s

EXTREMELY HIGH dv/dt CAPABILITY

s

100% AVALANCHE TESTED

DESCRIPTION

Using the latest high voltage MESH OVERLAY™

process, STMicroelectronics has designed an advanced

family

of

power

MOSFETs

with

outstanding

performances. The new patent pending strip layout

coupled with the Company’s proprietary edge termination

structure,

gives

the

lowest

RDS(on)

per

area,

exceptional

avalanche

and

dv/dt

capabilities

and

unrivalled gate charge and switching characteristics.

APPLICATIONS

s

SWITCHING “S” CAPACITOR

TYPE

VDSS

RDS(on)

ID

STP30NS15LFP

150 V

<0.1

Ω

10 A

1

2

3

TO-220FP

ABSOLUTE MAXIMUM RATINGS

(

•) Pulse width limited by safe operating area.

(1) Starting Tj = 25 oC, ID = 15A, VDD= 75V

(2) ISD ≤35A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

Symbol

Parameter

Value

Unit

VDS

Drain-source Voltage (VGS = 0)

150

V

VDGR

Drain-gate Voltage (RGS = 20 kΩ)

150

V

VGS

Gate- source Voltage

± 15

V

ID

Drain Current (continuous) at TC = 25°C

10

A

ID

Drain Current (continuous) at TC = 100°C

7A

IDM(•)

Drain Current (pulsed)

40

A

Ptot

Total Dissipation at TC = 25°C

30

W

Derating Factor

0.2

W/°C

EAS(1)

Single Pulse Avalanche Energy

300

mJ

dv/dt (2)

Peak Diode Recovery voltage slope

2.4

V/ns

Tstg

Storage Temperature

-55 to 175

°C

Tj

Operating Junction Temperature

INTERNAL SCHEMATIC DIAGRAM

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