R5F117BC datasheet(21/102 Pages) RENESAS

21 / 102 page

RL78/I1D

2. ELECTRICAL SPECIFICATIONS

R01DS0244EJ0220 Rev. 2.20

Page 21 of 99

Feb 20, 2017

Caution

The maximum value of VIH of pins P30 and P51 to P56 is VDD, even in the N-ch open-drain mode.

Remark

Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins.

(TA = -40 to +85°C, 1.6 V

≤ AVDD = VDD ≤ 3.6 V, VSS = AVSS = 0 V)

(TA = +85 to +105°C, 2.4 V

≤ AVDD = VDD ≤ 3.6 V, VSS = AVSS = 0 V)

(3/5)

Items

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input voltage, high

VIH1

P00 to P04, P30 to P33, P40,

P50 to P57, P130

Normal input buffer

0.8 VDD

VDD

VIH2

P30, P32, P33, P51, P52,

P54 to P57

TTL input buffer

3.3 V

≤ VDD ≤ 3.6 V

2.0

VDD

TTL input buffer

1.6 V

≤ VDD < 3.3 V

1.5

VDD

VIH3

P10 to P17, P20 to P25

0.7 AVDD

AVDD

VIH4

P60 to P63

0.7 VDD

6.0

VIH5

P121 to P124, P137, EXCLK, EXCLKS, RESET

0.8 VDD

VDD

Input voltage, low

VIL1

P00 to P04, P30 to P33, P40,

P50 to P57, P130

Normal input buffer

0.2 VDD

VIL2

P30, P32, P33, P51, P52,

P54 to P57

TTL input buffer

3.3 V

≤ VDD ≤ 3.6 V

00.5

TTL input buffer

1.6 V

≤ VDD < 3.3 V

00.32

VIL3

P10 to P17, P20 to P25

0.3 AVDD

VIL4

P60 to P63

0.3 VDD

VIL5

P121 to P124, P137, EXCLK, EXCLKS, RESET

0.2 VDD

R5F117BC Datasheet(PDF) 21 Page - Renesas Technology Corp

R5F117BC Datasheet(HTML) 21 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL