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HT45F4MA Datasheet(PDF) 113 Page - Holtek Semiconductor Inc |
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HT45F4MA Datasheet(HTML) 113 Page - Holtek Semiconductor Inc |
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113 / 145 page ![]() Rev. 1.20 112 De�e��e� 1�� 201� Rev. 1.20 113 De�e��e� 1�� 201� HT45F4MA/HT45FH4MA/HT45FH4MA-1 Power Bank Flash MCU HT45F4MA/HT45FH4MA/HT45FH4MA-1 Power Bank Flash MCU Interrupts Interruptsareanimportantpartofanymicrocontrollersystem.Whenanexternaleventoran internalfunctionsuchasaTimerModuleoranA/Dconverterrequiresmicrocontrollerattention, theircorrespondinginterruptwillenforceatemporarysuspensionofthemainprogramallowingthe microcontrollertodirectattentiontotheirrespectiveneeds.Thedevicecontainsseveralexternal interruptandinternalinterruptsfunctions.Theexternalinterruptisgeneratedbytheactionof theexternalINT0andINT1pins,whiletheinternalinterruptsaregeneratedbyvariousinternal functionssuchastheTMs,Comparator,TimeBase,LVD,EEPROMandtheA/Dconverter. Interrupt Registers Overallinterruptcontrol,whichbasicallymeansthesettingofrequestflagswhencertain microcontrollerconditionsoccurandthesettingofinterruptenablebitsbytheapplicationprogram, iscontrolledbyaseriesofregisters,locatedintheSpecialPurposeDataMemory,asshownin theaccompanyingtable.Theregistersfallintothreecategories.ThefirstistheINTC0~INTC2 registerswhichsetuptheprimaryinterrupts,thesecondistheMFI0~MFI2registerswhichsetupthe Multi-functioninterrupts.FinallythereisanINTEGregistertosetuptheexternalinterrupttrigger edgetype. Eachregistercontainsanumberofenablebitstoenableordisableindividualregistersaswellas interruptflagstoindicatethepresenceofaninterruptrequest.Thenamingconventionofthese followsaspecificpattern.Firstislistedanabbreviatedinterrupttype,thenthe(optional)numberof thatinterruptfollowedbyeitheran“E”forenable/disablebitor“F”forrequestflag. Function Enable Bit Request Flag Notes Glo�al EMI — — INTn Pin INTnE INTnF n= 0 o� 1 OVP OVPE OVPF — OCP OCPE OCPF — A/D Conve�te� ADE ADF — Multi-fun�tion MFnE MFnF n= 0~2 Ti�e Base TBnE TBnF n= 0 o� 1 LVD LVE LVF — EEPROM DEE DEF — TM TnPE TnPF n= 0 o� 1 TnAE TnAF Interrupt Register Bit Naming Conventions Interrupt Register Contents Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 INTEG — — — — INT1S1 INT1S0 INT0S1 INT0S0 INTC0 — INT0F OCPF OVPF INT0E OCPE OVPE EMI INTC1 ADF MF2F MF1F MF0F ADE MF2E MF1E MF0E INTC2 — INT1F TB1F TB0F — INT1E TB1E TB0E MFI0 — — T0AF T0PF — — T0AE T0PE MFI1 — — T1AF T1PF — — T1AE T1PE MFI2 — — DEF LVF — — DEE LVE |
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