 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HT45F3520 Datasheet(PDF) 41 Page - Holtek Semiconductor Inc |
|
|
|||||||||||||||||||||||||||||
HT45F3520 Datasheet(HTML) 41 Page - Holtek Semiconductor Inc |
|
|
41 / 134 page  Rev. 1.10 40 De�e��e� 1�� �01� Rev. 1.10 41 De�e��e� 1�� �01� HT45F3520/HT45F3530 Personal Care Flash MCU HT45F3520/HT45F3530 Personal Care Flash MCU SMOD1 Register Bit 7 6 5 4 3 2 1 0 Na�e FSYSON — — — — LVRF — WRF R/W R/W — — — — R/W — R/W POR 0 — — — — x — 0 "x" unknown Bit7 FSYSON:fSYSControlinIDLEMode 0:Disable 1:Enable Bit6~3 Unimplemented,readas"0" Bit2 LVRF:LVRfunctionresetflag Describeelsewhere Bit1 Unimplemented,readas"0" Bit0 WRF:WDTControlregistersoftwareresetflag Describeelsewhere Operating Mode Switching Thedevicescanswitchbetweenoperatingmodesdynamicallyallowingtheusertoselectthebest performance/powerratioforthepresenttaskinhand.Inthiswaymicrocontrolleroperationsthat donotrequirehighperformancecanbeexecutedusingslowerclocksthusrequiringlessoperating currentandprolongingbatterylifeinportableapplications. Insimpleterms,ModeSwitchingbetweentheNORMALModeandSLOWModeisexecutedusingthe HLCLKbitandCKS2~CKS0bitsintheSMODregisterwhileModeSwitchingfromtheNORMAL/ SLOWModestotheSLEEP/IDLEModesisexecutedviatheHALTinstruction.WhenaHALT instructionisexecuted,whetherthedeviceenterstheIDLEModeortheSLEEPModeisdeterminedby theconditionoftheIDLENbitintheSMODregisterandFSYSONintheSMOD1register. WhentheHLCLKbitswitchestoalowlevel,whichimpliesthatclocksourceisswitchedfromthe highspeedclocksource,fH,totheclocksource,fH/2~fH/64orfL.IftheclockisfromthefL,thehigh speedclocksourcewillstoprunningtoconservepower.Whenthishappensitmustbenotedthatthe fH/16andfH/64internalclocksourceswillalsostoprunning,whichmayaffecttheoperationofother internalfunctionssuchastheTMs. NORMAL fSYS=fH~fH/�4 fH on CPU �un fSYS on fTBC on SLOW fSYS=fL fL on CPU �un fSYS on fTBC on fH off IDLE0 HALT inst�u�tion exe�uted CPU stop IDLEN=1 FSYSON=0 fSYS off fTBC on IDLE1 HALT inst�u�tion exe�uted CPU stop IDLEN=1 FSYSON=1 fSYS on fTBC on SLEEP HALT inst�u�tion exe�uted fSYS off CPU stop IDLEN=0 fTBC off WDT on |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
