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PS9352AL2 Datasheet(PDF) 6 Page - Renesas Technology Corp |
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PS9352AL2 Datasheet(HTML) 6 Page - Renesas Technology Corp |
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6 / 21 page ![]() PS9352AL2 Chapter Title R08DS0129EJ0100 Rev.1.00 Page 6 of 19 Aug 24, 2015 ELECTRICAL CHARACTERISTICS (Tested with Sinc3 filter, 256 decimation ratio.) (TYP.: TA = 25 C, VIN = VIN = 0 V, VDD1 = VDD2 = 5 V, MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified) Parameter Symbol Conditions MIN. TYP. MAX. Unit Integral Non-linearity *3 INL 200 mV VIN 200 mV 3 30 LSB 0.01 0.14 % Differential Non-linearity *4 DNL 200 mV VIN 200 mV 1 LSB Input Offset Voltage *5 VOS 3 0 3 mV Input Offset Voltage Drift vs. Temperature dVOS/dTA 2 10 V/C Input Offset Voltage Drift vs. Supply Voltage dVOS/dVDD1 0.1 mV/V Internal Reference Voltage *6 VREF 320 mV Absolute Internal Reference Voltage Tolerance GE TA = 25 C 1 1 % TA = 40 to 110C 3 3 % Internal Reference Voltage Drift vs. Temperature dVREF/dTA 60 ppm/ C Internal Reference Voltage Drift vs. Supply Voltage dVREF/dVDD1 0.2 mV/V Input DC Common-Mode Rejection Ratio *7 CMRRIN 70 dB *3 Integral non-linearity (INL) is the maximum deviation between the ideal conversion line (best-fit line) and measured points. The best-fit line is obtained by using the least-squares method from the differential input voltage (VIN+ VIN: VIN+ = 200 mV to 200 mV, VIN = 0 V) and the output data that is measured under the circuit shown in Fig. 7 INL Test Circuit. INL is defined as the ratio (%) obtained by dividing [Half of the peak to peak value of the deviation] by [full-scale differential input voltage 400 mV]. For example, if the differential input voltage is VIN+ = 200 mV to 200 mV, and the peak to peak value of the deviation is 1.12 mV, Integral non-linearity is obtained as follows: INL = 1.12 mV/(2 400 mV) = 0.14% And Input Full-Scale 640 mV ( 320 to 320 mV) of PS9352AL2 is assigned 15 bits (215 = 32768). Therefore, Least Significant Bit (LSB) is 19.5 V. By LSB indication, above-mentioned INL is 1.12 mV/(2 0.0195 mV) = 29 LSBs. *4 Differential non-linearity (DNL) is the difference between a measured code width and ideal 1 LSB in the ADC transfer curve. *5 Input offset voltage (VOS) is a measured value after Sinc3 digital filter when the input voltage is 0 V (VIN+ = VIN- = 0 V). *6 Absolute Internal Reference Voltage Tolerance (GE) is the gap rate between the ideal conversion line slope (Slope = 1) and a best-fit line slope that provided by the least-squares method from a real conversion level output for the differential input voltage (VIN+ VIN-: VIN+ = 200 mV to 200 mV, VIN- = 0 V). *7 Input DC Common-Mode Rejection Ratio (CMRRIN) is the ratio of the differential signal (VIN+ = 200 mV to 200 mV, VIN = 0 V) to the common-mode signal (VIN+ = VIN = 200 mV to 200 mV: Both input pins are connected). CMRRIN is defined as follows, CMRRIN (dB) = 20log (Vdo/Vco) Vdo : Output voltage when the differential signal voltage input Vco : Output voltage when the common-mode signal voltage input |
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