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HT66F4530 Datasheet(PDF) 56 Page - Holtek Semiconductor Inc |
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HT66F4530 Datasheet(HTML) 56 Page - Holtek Semiconductor Inc |
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56 / 224 page  Rev. 1.00 5� De�e��e� �1� �01� Rev. 1.00 57 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers FAST Mode Asthenamesuggeststhisisoneofthemainoperatingmodeswherethemicrocontrollerhasallof itsfunctionsoperationalandwherethesystemclockisprovidedbyoneofthehighspeedoscillators. Thismodeoperatesallowingthemicrocontrollertooperatenormallywithaclocksourcewillcome fromoneofthehighspeedoscillators,eithertheHXTorHIRCoscillators.Thehighspeedoscillator willhoweverfirstbedividedbyaratiorangingfrom1to64,theactualratiobeingselectedby theCKS2~CKS0bitsintheSCCregister.Althoughahighspeedoscillatorisused,runningthe microcontrolleratadividedclockratioreducestheoperatingcurrent. SLOW Mode Thisisalsoamodewherethemicrocontrolleroperatesnormallyalthoughnowwithaslowerspeed clocksource.TheclocksourceusedwillbefromfSUB.ThefSUBclockisderivedfromeitherthe LIRCorLXToscillatordeterminedbytheFSSbitintheSCCregister. SLEEP Mode TheSLEEPModeisenteredwhenanHALTinstructionisexecutedandwhentheFHIDENand FSIDENbitarelow.IntheSLEEPmodetheCPUwillbestopped.ThefSUBclockprovidedtothe peripheralfunctionwillalsobestopped,too.HoweverthefLIRCclockstillcontinuestooperateifthe WDTfunctionisenabled. IDLE0 Mode TheIDLE0ModeisenteredwhenanHALTinstructionisexecutedandwhentheFHIDENbitin theSCCregisterislowandtheFSIDENbitintheSCCregisterishigh.IntheIDLE0Modethe CPUwillbeswitchedoffbutthelowspeedoscillatorwillbeturnedontodrivesomeperipheral functions. IDLE1 Mode TheIDLE1ModeisenteredwhenanHALTinstructionisexecutedandwhentheFHIDENbitinthe SCCregisterishighandtheFSIDENbitintheSCCregisterishigh.IntheIDLE1ModetheCPU willbeswitchedoffbutboththehighandlowspeedoscillatorswillbeturnedontoprovideaclock sourcetokeepsomeperipheralfunctionsoperational. IDLE2 Mode TheIDLE2ModeisenteredwhenanHALTinstructionisexecutedandwhentheFHIDENbitinthe SCCregisterishighandtheFSIDENbitintheSCCregisterislow.IntheIDLE2ModetheCPU willbeswitchedoffbutthehighspeedoscillatorwillbeturnedontoprovideaclocksourcetokeep someperipheralfunctionsoperational. Control Registers Theregisters,SCC,HIRCC,HXTCandLXTC,areusedtocontrolthesystemclockandthe correspondingoscillatorconfigurations. Register Name Bit 7 6 5 4 3 2 1 0 SCC CKS� CKS1 CKS0 — FHS FSS FHIDEN FSIDEN HIRCC — — — — HIRC1 HIRC0 HIRCF HIRCEN HXTC — — — — — HXTM HXTF HXTEN LXTC — — — — — — LXTF LXTEN System Operating Mode Control Registers List |
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