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HT66F4530 Datasheet(PDF) 135 Page - Holtek Semiconductor Inc |
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HT66F4530 Datasheet(HTML) 135 Page - Holtek Semiconductor Inc |
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135 / 224 page  Rev. 1.00 134 De�e��e� �1� �01� Rev. 1.00 135 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers • SIMC2 Register Bit 7 6 5 4 3 2 1 0 Na�e D7 D� CKPOLB CKEG MLS CSEN WCOL TRF R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7~6 D7~D6:Undefinedbits Thesebitscanbereadorwrittenbytheapplicationprogram. Bit5 CKPOLB:SPIclocklinebaseconditionselection 0:TheSCKlinewillbehighwhentheclockisinactive 1:TheSCKlinewillbelowwhentheclockisinactive TheCKPOLBbitdeterminesthebaseconditionoftheclockline,ifthebitishigh, thentheSCKlinewillbelowwhentheclockisinactive.WhentheCKPOLBbitis low,thentheSCKlinewillbehighwhentheclockisinactive. Bit4 CKEG:SPISCKclockactiveedgetypeselection CKPOLB=0 0:SCKishighbaselevelwhentheclockisinactiveanddatacaptureatSCKrisingedge. 1:SCKishighbaselevelwhentheclockisinactiveanddatacaptureatSCKfallingedge. CKPOLB=1 0:SCKislowbaselevelwhentheclockisinactiveanddatacaptureatSCKfallingedge. 1:SCKislowbaselevelwhentheclockisinactiveanddatacaptureatSCKrisingedge. TheCKEGandCKPOLBbitsareusedtosetupthewaythattheclocksignaloutputs andinputsdataontheSPIbus.Thesetwobitsmustbeconfiguredbeforedatatransfer isexecutedotherwiseanerroneousclockedgemaybegenerated.TheCKPOLBbit determinesthebaseconditionoftheclockline,ifthebitishigh,thentheSCKline willbelowwhentheclockisinactive.WhentheCKPOLBbitislow,thentheSCK linewillbehighwhentheclockisinactive.TheCKEGbitdeterminesactiveclock edgetypewhichdependsupontheconditionofCKPOLBbit. Bit3 MLS:SPIdatashiftorder 0:LSBfirst 1:MSBfirst Thisisthedatashiftselectbitandisusedtoselecthowthedataistransferred,either MSBorLSBfirst.SettingthebithighwillselectMSBfirstandlowforLSBfirst. Bit2 CSEN:SPISCSpincontrol 0:Disable 1:Enable TheCSENbitisusedasanenable/disablefortheSCSpin.Ifthisbitislow,thenthe SCSpinwillbedisabledandplacedintoafloatingcondition.IfthebitishightheSCS pinwillbeenabledandusedasaselectpin. Bit1 WCOL:SPIwritecollisionflag 0:Nocollision 1:Collision TheWCOLflagisusedtodetectifadatacollisionhasoccurred.Ifthisbitishighit meansthatdatahasbeenattemptedtobewrittentotheSIMDregisterduringadata transferoperation.Thiswritingoperationwillbeignoredifdataisbeingtransferred. Thebitcanbeclearedbytheapplicationprogram. Bit0 TRF:SPITransmit/Receivecompleteflag 0:SPIdataisbeingtransferred 1:SPIdatatransmissioniscompleted TheTRFbitistheTransmit/ReceiveCompleteflagandisset"1"automaticallywhen anSPIdatatransmissioniscompleted,butmustsetto"0"bytheapplicationprogram. Itcanbeusedtogenerateaninterrupt. |
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