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HT66F4530 Datasheet(PDF) 169 Page - Holtek Semiconductor Inc |
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HT66F4530 Datasheet(HTML) 169 Page - Holtek Semiconductor Inc |
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169 / 224 page  Rev. 1.00 1�8 De�e��e� �1� �01� Rev. 1.00 1�9 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers SDPGAC Register Bit 7 6 5 4 3 2 1 0 Na�e SDC0POL SDC1POL — — — SDPGA� SDPGA1 SDPGA0 R/W R/W R/W — — — R/W R/W R/W POR 0 0 — — — 0 0 0 Bit7 SDC0POL:SDComparator0outputpolaritycontrol 0:Outputnotinverted 1:Outputinverted ThisistheSDComparator0polaritybit.IfthebitiszerothentheSDC0OUTbit willreflectthenon-invertedoutputconditionofthecomparator.Ifthebitishighthe comparatorSDC0OUTbitwillbeinverted. Bit6 SDC1POL:SDComparator1outputpolaritycontrol 0:Outputnotinverted 1:Outputinverted ThisistheSDComparator1polaritybit.IfthebitiszerothentheSDC1OUTbit willreflectthenon-invertedoutputconditionofthecomparator.Ifthebitishighthe comparatorSDC1OUTbitwillbeinverted. Bit5~3 Unimplemented,readas"0" Bit2~0 SDPGA2~SDPGA0:PGAR2/R1ratecontrol 000:×1 001:×2 010:×4 011:×8 100:×16 101:×32 110:×56 111:×1 SDA0C Register Bit 7 6 5 4 3 2 1 0 Na�e — SDA0EN SDA0O — — — SDA0BW1 SDA0BW0 R/W — R/W R — — — R/W R/W POR — 0 0 — — — 0 0 Bit7 Unimplemented,readas"0" Bit6 SDA0EN:SDOPA0enableordisablecontrol 0:Disable 1:Enable Bit5 SDA0O:SDOPA0outputstatus(positivelogic) Thisbitisreadonly. WhenSDA0OFMbitissetto1,SDA0OisdefinedasSDOPA0outputstatus,refer tothe"OperationalAmplifierInputOffsetCalibration"sectionforthedetailedoffset calibrationprocedures. WhenSDA0OFMbitisclearedto0,thisbitwillbefixedatalowlevel. Bit4~2 Unimplemented,readas"0" Bit1~0 SDA0BW1~SDA0BW0:SDOPA0bandwidthcontrolbits 00:5kHz 01:40kHz 10:600kHz 11:2MHz Referto"OperationalAmplifierElectricalCharacteristics"fordetails. |
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