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HT82V48 Datasheet(PDF) 5 Page - Holtek Semiconductor Inc |
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HT82V48 Datasheet(HTML) 5 Page - Holtek Semiconductor Inc |
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5 / 14 page  Rev. 1.20 5 May 19, 2017 HT82V48 Symbol Parameter Test Conditions Min. Typ. Max. Unit VOH High level output voltage IOH=1mA DVDD-0.5 — — V VOL LOR level output voltage IOL=1mA — — 0.5 V IOZ High impedance output current — — — 1 μA Digital I/O Pins VIH Applied high level input voltage — 0.7×DVDD — — V VIL Applied low level input voltage — — — 0.2×DVDD V VOH High level output voltage IOH=1mA DVDD-0.5 — V VOL Low level output voltage IOL=1mA — — 0.5 V IIL Low level input current — — — 1 μA IIH High level input current — — — 1 μA IOZ High impedance output current — — — 1 μA Supply Currents Total supply current — — 290 — mA Analogue supply current — — 240 — mA Digital supply current — — 50 — mA Power down mode — — 400 — μA A.C. Characteristics AVDD=DVDD=3.3V, AVSS=DVSS=0V, Ta=25°C, ADCK=60MHz unless otherwise stated. Symbol Parameter Test Conditions Min. Typ. Max. Unit Clock Parameter tADCK ADCK period — 16.67 — — ns DUTY ADCK duty — 45 50 55 % tSSH SH setup time — 0 — 4 ns tHSH SH hold time — 0 — 4 ns tSH SH width — — 1/2 — ADCK Serial Control Interface tSSCK SCK setup time — 10 — — ns tHSCK SCK hold time — 10 — — ns tSSD SD setup time — 10 — — ns tHSD SD hold time — 10 — — ns tTSD SD transition time; input/output alternated — 5 — — ns Data Output tVD 3-state to data valid — — 3 4 ns tZD Output enable high to 3-state — — 3 4 ns tDD Data output propagation delay — — 8 10 ns LAT Output latency (Pipeline delay) — — — 7 ADCK Note:Parametersaremeasuredat50%oftherising/fallingedge. |
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