ADC10080 datasheet(6/19 Pages) NSC

6 / 19 page

DC and Logic Electrical Characteristics Unless otherwise specified, the following specifications

apply for V

SSA =VSSIO = 0V, VDDA = +3.0V, VDDIO = +2.5V, VIN =2VP-P, STBY = 0V, VREF = 1.20V, (Externally Supplied)

CLK = 80 MHz, 50% Duty Cycle, CL = 10 pF/pin. Boldface limits apply for TA =TMIN to TMAX: all other limits TA = 25˚C

Symbol

Parameter

Conditions

Min

Typ

Max

Units

CLK, DF, STBY, SENSE

Logical “1” Input Voltage

Logical “0” Input Voltage

0.8

Logical “1” Input Current

+10

µA

Logical “0” Input Current

−10

µA

D0–D9 OUTPUT CHARACTERISTICS

Logical “1” Output Voltage

OUT = −0.5 mA

DDIO−0.2

Logical “0” Output Voltage

OUT = 1.6 mA

0.4

DYNAMIC CONVERTER CHARACTERISTICS

ENOB

Effective Number of Bits

IN = 10.0 MHz

9.3, 9.1

9.5

Bits

IN = 39 MHz

9.3, 8.9

9.5

Bits

SNR

Signal-to-Noise Ratio

IN = 10.0 MHz

58.5, 57.7

59.5

IN = 39 MHz

58.0, 57.0

59.2

SINAD

Signal-to-Noise Ratio + Distortion

IN = 10.0 MHz

58.0, 56.3

59.2

IN = 39 MHz

57.6, 55.6

59.0

2nd HD

2nd Harmonic

IN = 10.0 MHz

−74.1,

−68.7

−87.0

dBc

IN = 39 MHz

−69.5,

−62.7

−82

dBc

3rd HD

3rd Harmonic

IN = 10.0 MHz

−65,

−58.6

−72.3

dBc

IN = 39 MHz

−64.7,

−57.6

−74.5

dBc

THD

Total Harmonic Distortion (First 6

Harmonics)

IN = 10.0 MHz

−65,

−58.6

−72.3

IN = 39 MHz

−64.7,

−57.6

−74.5

SFDR

Spurious Free Dynamic Range

(Excluding 2nd and 3rd Harmonic)

IN = 10.0 MHz

−70.8,

−68.2

−78.7

dBc

IN = 39 MHz

−72, −68

−78.8

dBc

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