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LPC2114 Datasheet(PDF) 10 Page - NXP Semiconductors |
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LPC2114 Datasheet(HTML) 10 Page - NXP Semiconductors |
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10 / 34 page ![]() Philips Semiconductors LPC2114/LPC2124 Single-chip 16/32-bit microcontrollers Product data Rev. 03 — 22 December 2004 10 of 34 9397 750 13145 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. are disabled. However, the ISP Flash Erase command can be executed at any time (no matter whether the CRP is on or off). Removal of CRP is achieved by erasure of full on-chip user Flash. With the CRP off, full access to the chip via the JTAG and/or ISP is restored. 6.3 On-Chip static RAM On-Chip static RAM may be used for code and/or data storage. The SRAM may be accessed as 8-bits, 16-bits, and 32-bits. The LPC2114/LPC2124 provide 16 kB of static RAM. 6.4 Memory map The LPC2114/LPC2124 memory maps incorporate several distinct regions, as shown in the following figures. In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either Flash memory (the default) or on-chip static RAM. This is described in Section 6.19 “System control”. |
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