LFC789D25

DUAL LINEAR FET CONTROLLER

SLLS565B − MARCH 2003 − REVISED SEPTEMBER 2004

2

POST OFFICE BOX 655303

functional block diagram

_

+

_

+

DRV_V25

SEN_V25

VCC

NC

5

6

7

8

Bandgap

Reference

GND

VREF

SEN_VADJ

DRV_VADJ

4

3

2

1

4 k

Ω

3.6 k

Ω

PIN DESCRIPTION

PIN

PIN NAME

PIN FUNCTION

1

DRV_VADJ

Output of adjustable controller. Drives gate(s) of FET(s) to output user-programmable voltage (VADJ).

2

SEN_VADJ

Sense input of adjustable controller. Senses changes in VADJ.

3

VREF

Input pin used to program VADJ, allowing VADJ to track changes in VREF

4

GND

Ground

5

NC

No connection

6

SEN_V25

Sense Input of 2.5-V controller. Senses changes in 2.5-V supply.

7

DRV_V25

Output of 2.5-V controller. Drives gate(s) of FET(s) to output fixed 2.5 V.

8

VCC

Power supply for device