ST92F120 datasheet(57/324 Pages) STMICROELECTRONICS

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ST92F120 - REGISTER AND MEMORY MAP

Figure 29. ST92F120 User Memory Map (part 3)

4.3 ST92F120 REGISTER MAP

Table 15 contains the map of the group F periph-

eral pages.

The common registers used by each peripheral

are listed in Table 14.

Be very careful to correctly program both:

– The set of registers dedicated to a particular

function or peripheral.

– Registers common to other functions.

– In particular, double-check that any registers

with “undefined” reset values have been correct-

ly initialised.

Caution: Note that in the EIVR and each IVR reg-

ister, all bits are significant. Take care when defin-

ing base vector addresses that entries in the Inter-

rupt Vector table do not overlap.

Table 14. Common Registers

RAM

SEGMENT 20h

64 Kbytes

200000h

20FFFFh

20C000h

20BFFFh

208000h

207FFFh

204000h

203FFFh

PAGE 80h- 16 Kbytes

PAGE 81h - 16 Kbytes

PAGE 82h - 16 Kbytes

PAGE 83h - 16 Kbytes

200000h

200FFFh

Not Available

2007FFh

2 Kbytes

4 Kbytes

Function or Peripheral

Common Registers

SCI, MFT

CICR + NICR + DMA REGISTERS + I/O PORT REGISTERS

A/D

CICR + NICR + I/O PORT REGISTERS

SPI, WDT, STIM

CICR + NICR + EXTERNAL INTERRUPT REGISTERS +

I/O PORT REGISTERS

I/O PORTS

I/O PORT REGISTERS + MODER

EXTERNAL INTERRUPT

INTERRUPT REGISTERS + I/O PORT REGISTERS

RCCU

INTERRUPT REGISTERS + MODER

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