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IXBD4410

IXBD4411

Application

The IXBD4410/4411 chipset devices

are specifically designed as MOS-

gated transistor drivers in half-bridge

power converters, 1- and 3-phase

motor controls, and UPS applications.

The phase-leg PWM command is

normally generated by previous (user

provided) circuitry. It must be

decomposed into two separate logic

signals, one for the high-side and one

for the low-side power transistors, with

appropriate deadtime for each state

transition. The deadtime insures non-

overlapping conduction even if the

turn-on and turn-off delay times of the

power devices are unequal. The

minimum deadtime should be greater

than t

device like the IXYS deadtime

generator IXDP630, can be used to

perform this function. The

ISOSMART™ chipset family of

devices do not generate deadtime,

although there is an internal lockout

that prohibits one device form being

commanded "on" before the other is

commanded "off". This simplifies start-

up and shutdown protection circuitry,

preventing logic error during power-up

from turning on both high-and low-side

transistors simultaneously.

Negative V

Design

The on-chip V

the IXBD4410/4411 generates a nega-

tive power supply, regulated at 20 V

below the positive V

V, V

will be -5 V. This negative drive

potential in the off-state is either

desirable or required in many in-

stances. When switching a clamped

inductive load (Fig. 5), the turn-on of

Q2 will commutate the freewheeling

diode around Q1. Whether this diode is

intrinsic (as in a MOSFET) or extrinsic

(IGBT or bipolar), its reverse recovery

is critical to proper circuit operation.

At high turn-on di/dt in Q2 and near its

rated voltage, the recovery of D1 can

get quite "snappy" (the di/dt in the

second half of the recovery process,

after the diode has begun to recover its

blocking capability, can get very large),

creating a very high dv/dt across Q1.

This dv/dt is impressed across the

Miller capacitance of Q1, forcing a

large current to flow out the gate

reduces the voltage required to create

a failure, this problem is even more

likely to occur. In an industrial module

package (e.g.: a 150 A/1200 V IGBT

phase-leg module), the series induc-

tance contributed by the long gate

leads and connectors further compli-

cate the design.

In a heavily snubbered converter, or in

a power supply design with low

transformer leakage inductance, the

design problem is relatively simple and

negative drive is seldom required.

However, in a modern snubberless or

lightly snubbered converter design, it is

important to keep the gate drive

impedance high enough during

transistor turnoff to limit the reapplied

dv/dt (the transistor is its own 'active'

snubber). This is always important for

EMI control, and in the case of IGBT

may be required to achieve the

necessary RBSOA. At the same time, it

is mandatory to keep the off-state gate

drive impedance very low to assure the

transistor remain off during induced

dv/dt (including diode recovery dv/dt).

In some instances, it is simply not

possible to satisfy both criteria with 0 V

applied in the off-state. In these cases

the IXBD4410/4411 with V

bias generator must be used.

The internal V

pump circuit. Referring to Fig. 6, an

external charge pump capacitor is

required between the CA and CB

terminal of the device. If this current

pulse causes a high enough voltage

drop across the output impedance of

the gate drive circuit, R

turned on.

The Q1 conduction in every instance

Q2 is turned on (and vice versa), aside

from degrading efficiency, can lead to

catastrophic failure of both power

transistors. At high temperature, where

the -6 to -7 mV/

°C temperature

coefficient of IGBT/MOSFET threshold

Fig. 5: Switching a clamped inductive

load

Fig. 6: IXBD4410/4411 Detailed one phase circuit with dead time generator IXDP 630

1N5817

1N5817