© 2004 IXYS All rights reserved

IXBD4410

IXBD4411

If the MOSFET switched 25 A, the

transient will last as long as (25/500)

µs

or 50 ns, which is more than the typical

6 or 7 ns propagations or of a 74HC

series gate.

conversion equipment due to their very

high common mode dv/dt rejection

capabilities.

Transformer Considerations

The transformer is the communication

link and isolation barrier between the

high- and low-side ICs. The high-side

gate and fault signals are transmitted

through the transformer while main-

taining the proper isolation. The

transmitter signal is in the form of a

Fig. 10: Potential layout problems that create functional problems

MOSFET on, continuing the oscillation

for one more cycle.

To eliminate this problem, a ground

level transformation circuit must be

added, that rejects this common mode

transient. The simplest is a de-coupling

circuit, also illustrated in Fig. 10. The

capacitor voltage on C

constant while the transient voltage is

dropped across R

detects no input transition, eliminating

the oscillation. This circuit does add

significantly to turn-on and turn-off delay

time, and cannot be used if the transient

lasts longer than the allowable delays.

Delay times must be considered in

selection of system dead time.

The most complex (and most effective)

method of eliminating the effects of

transients between grounds is isolation.

Optocouplers and pulse transformers

are the most commonly used isolation

techniques, and work very well in this

case. The IXDP630/631 has been

specifically designed to directly drive a

high speed optocoupler like the Hewlett

Packard HCPL22XX family or the

General Instrument 740L60XX optologic

family. These optos are especially well

suited to motor control and power

square wave, but the receiver responds

only to the logic edges. This allows for

much smaller transformer designs,

since a 10 kHz switching frequency

does not require a 10 kHz pulse

transformer.

The recommended transformer for this

ISOSMART™ driver chipset is

fabricated using a very small ferrite

shield bead (see Fig. 11), onto which a

six-turn primary and a two-turn

secondary winding of 36 AWG magnet

wire are made. The two windings are

segment wound to achieve primary-to-

secondary isolation of up to 2500 V~.

The six-turn primaries are connected to

the respective IXBD4410/4411

transmitter outputs and the two-turn

secondaries are connected to their

respective receiver inputs.

Fig. 9: Suggested IC Orientation

Fig. 10 illustrates an example layout

problem. The power circuit consists of

three power transistors (MOSFETs in

this example). With the ISOSMART™

gate driver chipset grounded as in

option (b) in Fig. 10, the communication

path from the IXDP630 will operate

without errors. The PC trace induced

voltages are not common with the digital

path, so the input of the gate driver will

not see or respond to them.

Unfortunately, the MOSFET will not

operate properly. The voltage induced

across LS1 when Q1 is turned on, acts

as source degeneration, modifying the

turn-on behavior of the MOSFET. If

LS1= 27 nH, and V

the gate plateau of the MOSFET is 6 V),

the di/dt at turn-on will be regulated by

the driver/MOSFET/LS1 loop to about

200 A/

µs; quite a surprise when your

circuit requires 500 A/

µs to operate

correctly.

It is possible to make use of this

behavior to create a turn-on or turn-off

di/dt limiter (perhaps to snub the upper

free wheeling diode reverse recovery).

While possible, this is normally not

desirable or practical where two or more

transistors are controlled. Equalizing the

parasitic impedances of three traces

while positioning the transistors next to

their heat sink and meeting UL/VDE

voltage spacings is just too difficult.

Grounding the gate driver as in option

(a) in Fig. 10 solves the MOSFET turn

on problem by eliminating LS1 from the

source feedback loop. Now, unfor-

tunately, the gate driver will oscillate

every time it is turned on or off. As the

IXDP630 output goes "high", the gate

drive output follows (after its propaga-

tion delay) and the MOSFET starts to

conduct. The voltage transient induced

across LS1 (V = LS1 • di/dt) raises the

local ground (point a) until it exceeds

V

propagation delay) turns the MOSFET

off. Now the MOSFET current falls,

V(LS1) drops, point (a) drops to system

ground (or slightly below), and the driver

detects a "1" at its input. After its

propagation delay, it again turns the