PIC16F74-ESLASHSS datasheet(46/174 Pages) MICROCHIP

46 / 174 page

PIC16F7X

DS30325B-page 44

 2002 Microchip Technology Inc.

5.2

Using Timer0 with an External

Clock

When no prescaler is used, the external clock input is

the same as the prescaler output. The synchronization

of T0CKI, with the internal phase clocks, is accom-

plished by sampling the prescaler output on the Q2 and

Q4 cycles of the internal phase clocks. Therefore, it is

necessary for T0CKI to be high for at least 2Tosc (and

a small RC delay of 20 ns) and low for at least 2Tosc

(and a small RC delay of 20 ns). Refer to the electrical

specification of the desired device.

OPTION_REG REGISTER

R/W-1

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

bit 7

bit 0

bit 7

RBPU: PORTB Pull-up Enable bit (see Section 2.2.2.2)

bit 6

INTEDG: Interrupt Edge Select bit (see Section 2.2.2.2)

bit 5

T0CS: TMR0 Clock Source Select bit

= Transition on T0CKI pin

= Internal instruction cycle clock (CLKOUT)

bit 4

T0SE: TMR0 Source Edge Select bit

= Increment on high-to-low transition on T0CKI pin

= Increment on low-to-high transition on T0CKI pin

bit 3

PSA: Prescaler Assignment bit

= Prescaler is assigned to the WDT

= Prescaler is assigned to the Timer0 module

bit 2-0

PS2:PS0: Prescaler Rate Select bits

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR reset

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

000

001

010

011

100

101

110

111

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

1 : 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

Bit Value

TMR0 Rate

WDT Rate

Note:

To avoid an unintended device RESET, the instruction sequences shown in

Example 5-1 and Example 5-2 (page 45) must be executed when changing the pres-

caler assignment between Timer0 and the WDT. This sequence must be followed

even if the WDT is disabled.

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