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74HC173N Datasheet (PDF) - NXP Semiconductors

74HC173N Datasheet PDF - NXP Semiconductors
Part # 74HC173N
Download  74HC173N Download

File Size   69.04 Kbytes
Page   10 Pages
Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors
Description Quad D-type flip-flop; positive-edge trigger; 3-state

74HC173N Datasheet (PDF)

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74HC173N Datasheet PDF - NXP Semiconductors

Part # 74HC173N
Download  74HC173N Click to download

File Size   69.04 Kbytes
Page   10 Pages
Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors
Description Quad D-type flip-flop; positive-edge trigger; 3-state

74HC173N Datasheet (HTML) - NXP Semiconductors

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74HC173N Product details

GENERAL DESCRIPTION
The 74HC/HCT173 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT173 are 4-bit parallel load registers with clock enable control, 3-state buffered outputs (Q0 to Q3) and master reset (MR).
When the two data enable inputs (E1 and E2) are LOW, the data on the Dn inputs is loaded into the register synchronously with the LOW-to-HIGH clock (CP) transition. When one or both En inputs are HIGH one set-up time prior to the LOW-to-HIGH clock transition, the register will retain the previous data. Data inputs and clock enable inputs are fully edge-triggered and must be stable only one set-up time prior to the LOW-to-HIGH clock transition.
The master reset input (MR) is an active HIGH asynchronous input. When MR is HIGH, all four flip-flops are reset (cleared) independently of any other input condition.
The 3-state output buffers are controlled by a 2-input NOR gate. When both output enable inputs (OE1 and OE2) are LOW, the data in the register is presented to the Qn outputs. When one or both OEn inputs are HIGH, the outputs are forced to a high impedance OFF-state. The 3-state output buffers are completely independent of the register operation; the OEn transition does not affect the clock and reset operations.

FEATURES
• Gated input enable for hold (do nothing) mode
• Gated output enable control
• Edge-triggered D-type register
• Asynchronous master reset
• Output capability: bus driver
• ICC category: MSI




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About NXP Semiconductors


NXP Semiconductors is a publicly traded multinational company that designs, develops, and manufactures a wide range of semiconductors and integrated circuits for various applications, including automotive, industrial, communications, and consumer markets.
The company was founded in 2006 and is headquartered in Eindhoven, Netherlands.
NXP offers a broad portfolio of products, including microcontrollers, microprocessors, secure authentication ICs, power management ICs, RF and microwave components, and sensor solutions, among others.
The company's products are designed to be energy efficient, secure, and reliable, and are used in a variety of applications, including automotive systems, industrial automation and control, smart homes and buildings, and connected devices.
NXP is dedicated to innovation and customer satisfaction, and is committed to providing its customers with the best semiconductor solutions to meet their needs.

*This information is for general informational purposes only, we will not be liable for any loss or damage caused by the above information.




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