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74AUP1T86 Datasheet (PDF) - Nexperia B.V. All rights reserved

74AUP1T86 Datasheet PDF - Nexperia B.V. All rights reserved
Part # 74AUP1T86
Download  74AUP1T86 Download
File Size   236.49 Kbytes
Page   14 Pages
Manufacturer  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Description Low-power 2-input EXCLUSIVE-OR gate with voltage-level translator

74AUP1T86 Datasheet (PDF)

Go To PDF Page Download Datasheet
74AUP1T86 Datasheet PDF - Nexperia B.V. All rights reserved

Part # 74AUP1T86
Download  74AUP1T86 Click to download

File Size   236.49 Kbytes
Page   14 Pages
Manufacturer  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Description Low-power 2-input EXCLUSIVE-OR gate with voltage-level translator

74AUP1T86 Datasheet (HTML) - Nexperia B.V. All rights reserved


74AUP1T86 Product details

1. General description
The 74AUP1T86 provides the single 2-input EXCLUSIVE-OR function. This device ensures a very
low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.
The 74AUP1T86 is designed for logic-level translation applications with input switching levels that
accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply
voltage.
The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to
2.3 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing the damaging backflow current through the device when it is
powered down.
Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire
VCC range.
2. Features and benefits
• Wide supply voltage range from 2.3 V to 3.6 V
• High noise immunity
• ESD protection:
• HBM JESD22-A114F Class 3A exceeds 5000 V
• CDM JESD22-C101E exceeds 1000 V
• Low static power consumption; ICC = 1.5 μA (maximum)
• Latch-up performance exceeds 100 mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• Low noise overshoot and undershoot < 10 % of VCC
• IOFF circuitry provides partial power-down mode operation
• Specified from -40 °C to +85 °C and -40 °C to +125 °C




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