LPS Marking, LP6253HSPF datasheet(7/12 Pages) POWER

7 / 12 page

LP6253H

Aug.-2017

Email: marketing@lowpowersemi.com

www.lowpowersemi.com

Page 7 of 12

Preliminary Datasheet

LP6253H

Operation Information

The LP6253H uses a synchronous 650KHz fixed

frequency, current-mode regulation architecture to

regulate the output voltage. The LP6253H measures

the output voltage through an external resistive

voltage divider and compares that to the internal

1.21V reference to generate the error voltage to the

inductor current to regulate the output voltage. The

use of current-mode regulation improves transient

response and control loop stability. The peak current

of the NMOS switch is also sensed to limit the

maximum current flowing through the switch and the

inductor. The typical peak current limit is set to 8A.

An internal temperature sensor prevents the device

from getting overheated in case of excessive power

dissipation.

The device integrates a high side N-channel and a

low side N-channel MOSFET transistor to realize a

synchronous rectifier. Because the commonly used

discrete Schottky rectifier is replaced with a low

RDS(ON) NMOS switch, the power conversion

efficiency reaches 96%. To avoid ground shift due to

the high currents in the NMOS switch, two separate

ground pins are used. The reference for all control

functions is the GND pin. The source of the NMOS

switch is connected to GND. A special circuit is

applied to disconnect the load from the input during

shutdown of the converter. In conventional

synchronous rectifier circuits, the back gate diode of

the high-side NMOS is forward biased in shutdown

and allows current flowing from the VIN to the VOUT.

This device however uses a special circuit which

takes the cathode of the back gate diode of the

high-side NMOS and disconnects it from the source

when the regulator is not enabled (EN=low).

The benefit of this feature for the system design

engineer is that the battery is not depleted during

shutdown

the

converter.

additional

components have to be added to the design to make

sure that the battery is disconnected from the output

of the converter.

Device Enable

The device is put into operation when EN is set high.

It is put into a shutdown mode when EN is set to

GND. In shutdown mode, the regulator stops

switching, all internal control circuitry including the

low-battery comparator is switched off, and the load

is isolated from the input (as described in the

Synchronous Rectifier Section). This also means that

the output voltage can drop below the input voltage

during shutdown. During start-up of the converter,

the duty cycle and the peak current are limited in

order to avoid high peak currents drawn from the

battery.

Undervoltage Lockout

An under voltage lockout function prevents device

start-up if the supply voltage on VIN is lower than

approximately 2V. When in operation and the battery

is being discharged, the device automatically enters

the shutdown mode if the voltage on VIN drops

below approximately 1.8V. This undervoltage lockout

function is implemented in order to prevent the

malfunctioning of the converter.

LPS Marking, LP6253HSPF Datasheet(PDF) 7 Page - Lowpower Semiconductor inc

LP6253HSPF Datasheet(HTML) 7 Page - Lowpower Semiconductor inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

Datasheet Download

Link URL