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LTC3428 Datasheet(PDF) 4 Page - Linear Technology |
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LTC3428 Datasheet(HTML) 4 Page - Linear Technology |
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4 / 12 page ![]() LTC3428 4 3428f PI FU CTIO S PGNDA, PGNDB (Pins 1, 10, 11 (Exposed Pad)): Power Ground for the IC. Tie directly to local ground plane. SWB (Pin 2), SWA (Pin 9): Phase B and Phase A Switch Pins. The inductor and Schottky diodes for each phase are connected to these pins. Minimize trace length to reduce EMI. VOUT (Pin 3): Power Supply Output and Bootstrapped Power Source for the IC. Connect low ESR output filter capacitors from this pin to the ground plane. SHDN (Pin 4): Shutdown Pin. Grounding this pin shuts down the IC. Connect to a voltage greater than 1.5V to enable. TYPICAL PERFOR A CE CHARACTERISTICS 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 3428 G10 TEMPERATURE (°C) –45 15 55 –25 –5 35 75 95 Peak Current Limit vs Temperature VC (Pin 5): Error Amp Output. A frequency compensation network is connected to this pin to compensate the boost converter loop. FB (Pin 6): Feedback Pin. A resistor divider from VOUT is connected here to set the output voltage according to VOUT = 1.243 • (1 + R1 / R2) AGND (Pin 7): Signal Ground for the IC. Connect to ground plane near feedback resistor divider. VIN (Pin 8): Input Supply Pin. Bypass VIN with a low ESR ceramic capacitor of at least 4.7µF. X5R and X7R dielec- trics are preferred for their superior voltage and tempera- ture characteristics. |
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