PCI7510 datasheet(33/234 Pages) TI

33 / 234 page

2–14

Table 2–10. Multifunction and Miscellaneous Terminals

TERMINAL

NAME

NUMBER

I/O

DESCRIPTION

NAME

PDV

GHK

I/O

DESCRIPTION

CLK_48

204

F06

48-MHz clock terminal

MFUNC0

F05

I/O

Multifunction terminal 0. See Section 4.36, Multifunction Routing Status Register, for

configuration details.

MFUNC1

G06

I/O

Multifunction terminal 1. See Section 4.36, Multifunction Routing Status Register, for

configuration details.

MFUNC2

F03

I/O

Multifunction terminal 2. See Section 4.36, Multifunction Routing Status Register, for

configuration details.

MFUNC3

F02

I/O

Multifunction terminal 3. See Section 4.36, Multifunction Routing Status Register, for

configuration details.

MFUNC4

G05

I/O

Multifunction terminal 4. See Section 4.36, Multifunction Routing Status Register, for

configuration details.

MFUNC5

F01

I/O

Multifunction terminal 5. See Section 4.36, Multifunction Routing Status Register, for

configuration details.

MFUNC6

H06

I/O

Multifunction terminal 6. See Section 4.36, Multifunction Routing Status Register, for

configuration details.

—

84, 89, 94,

100, 102,

104

E05

P11, P12,

P13, P14,

R14, W16

No connect. These terminals have no connection anywhere within the package. Terminal

E05 on the GHK package is used as a key to indicate the location of the A01 corner of

the BGA package.

PHY_TEST_MA

112

P18

PHY test pin. Not for customer use. It must be tied to ground.

RI_OUT/PME

J03

Ring indicate out and power management event output. This terminal provides an output

for ring-indicate or PME signals.

SCL

E03

I/O

Serial clock. This terminal provides the serial clock signaling and is implemented as

open-drain. For normal operation (a ROM is implemented in the design), this terminal

must be pulled high to the ROM VDD with a 2.7-kΩ resistor. Otherwise, it must be pulled

low to ground with a 220-

Ω resistor.

SDA

D01

I/O

Serial data. At GRST, the SDA signal is sampled to determine if a two-wire serial ROM

is present. If the serial ROM is detected, then this terminal provides the serial data

signaling.

This terminal is implemented as open-drain, and for normal operation (a ROM is

implemented in the design), this terminal must be pulled high to the ROM VDD with a

2.7-k

Ω resistor. Otherwise, it must be pulled low to ground with a 220-Ω resistor.

SKT_SEL0

SKT_SEL1

U10

R10

I/O

Socket select terminals. These two terminals must be connected to ground through

pulldown resistors.

SPKROUT

E02

Speaker output. SPKROUT is the output to the host system that can carry SPKR or

CAUDIO through the PCI7510 device from the PC Card interface. SPKROUT is a low

value (0) default. Card insertion or removal, or turning power on or off does not cause any

changes to the SPKROUT terminal.

SUSPEND

G03

Suspend. SUSPEND protects the internal registers from clearing when the GRST or

PRST signal is asserted. See Section 3.9.6, Suspend Mode, for details.

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