HT66F0187 datasheet(21/192 Pages) HOLTEK

21 / 192 page

Rev. 1.20

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Rev. 1.20

��st 2�� 201�

HT66F0187

A/D Flash MCU with EEPROM

HT66F0187

A/D Flash MCU with EEPROM

System Architecture

Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed

totheirinternalsystemarchitecture.Therangeofthedevicetakeadvantageoftheusualfeatures

foundwithinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhanced

performance.Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingand

instructionexecutionareoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,with

theexceptionofbranchorcallinstructionsorextendedinstructions.An8-bitwideALUisusedin

practicallyallinstructionsetoperations,whichcarriesoutarithmeticoperations,logicoperations,

rotation,increment,decrement,branchdecisions,etc.Theinternaldatapathissimplifiedbymoving

datathroughtheAccumulatorandtheALU.Certaininternalregistersareimplementedinthe

DataMemoryandcanbedirectlyorindirectlyaddressed.Thesimpleaddressingmethodsofthese

registersalongwithadditionalarchitecturalfeaturesensurethataminimumofexternalcomponents

isrequiredtoprovideafunctionalI/OandA/Dcontrolsystemwithmaximumreliabilityand

flexibility.Thismakesthedevicesuitableforlow-cost,high-volumeproductionforcontroller

applications.

Clocking and Pipelining

Themainsystemclock,derivedfromeitheraHXT,LXT,HIRCorLIRCoscillatorissubdivided

intofourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincremented

atthebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.Theremaining

T2~T4clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clock

cycleformsoneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplace

inconsecutiveinstructioncycles,thepipeliningstructureofthemicrocontrollerensuresthat

instructionsareeffectivelyexecutedinoneinstructioncycleexceptextendedinstructions.The

exceptiontothisareinstructionswherethecontentsoftheProgramCounterarechanged,such

assubroutinecallsorjumps,inwhichcasetheinstructionwilltakeonemoreinstructioncycleto

execute.

Fe tc h In st . ( PC )

Ex ec ut e In st . (P C- 1)

Fe tc h In st . (P C+ 1)

Ex ec ut e In st . (P C)

Fe tc h In st . (P C+ 2)

Ex ec ut e In st . (P C+ 1)

PC +1

PC +2

f SY S

(S yst em C lo ck)

P has e Cl o ck T1

Pr ogr am C oun te r

P has e Cl o ck T2

P has e Cl o ck T3

P has e Cl o ck T4

Pi pe lin in g

System Clocking and Pipelining

HT66F0187 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc

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