CIP3250A datasheet(17/44 Pages) MICRONAS

17 / 44 page

ADVANCE INFORMATION

CIP 3250A

Micronas

Table 2–9: The I2C-bus addresses of the CIP 3250A – Device Address: 6E Hex (7 bit, R/W bit omitted, see Sec. 2.16.)

MIXAMP

amplification of Fast Blank amplitude

MSB

321

LSB

Bit

No.

Sub.

Addr.

NOISSU

noise shaping of U

–

SATU

saturation multiplier of U

NOISSV

noise shaping of V

–

SATV

saturation multiplier of V

NOISSY

noise shaping of Y

–

SATY

contrast multiplier of Y

BRY

brightness correction of Y

CBSON

CTBRST block

enable

MAON

matrix block

enable

SKWON

skew correction

–

enable

SMODE

saturation mode

CLSEL

clamping offset for Y

SKWCBS

skew filter mode

–

ATST

testbits

LPFLUM

luma low pass filter selection

–

PASSYUV

soft mixer control

D2KIN

input amplifier of

–

digital YUVin

DELAYU

UV format of YUVin

–

HALFOUT

output drive

CYLUM1

Y low pass filter

–

offset correction 1

CYLUM2

Y low pass filter

–

offset correction 2

CYCHR1

UV low pass filter

–

offset correction 1

CYCHR2

UV low pass filter

–

offset correction 2

LPFCHR

chroma low pass filter selection

–

TESTCLP

test clamping

YUV

analog input select

SE_4_8Q

analog gain control

SELAMP

analog gain control

CLMPOFS

RGB clamping offset

AVODIS

disable ACVOUT

–

DL1ON

delay of YUVin

UVBINCON

UV sign of YUVin

UVFRM3

UV format of YUVin

UVFRM1

UV format of YUVin

YLEVEL

convert Y format

–

SELDLY

adjust delay of RGB/YUV-path

SELLIN

select soft mixer

CTRLDLY

delay control

FBLOFF

Fast Blank offset correction

FBLTEN

Fast Blank test

PASSRGB

soft mixer control

OVR

override value for PRIO-interface

–

PRIOID

set PRIO priority

–

PRIOEN

access to Picture Bus

LOAD

adjust load strength of

–

Picture Bus and PRIO bus

PUDIS

disable pull up

–

of YUV/RBG output

UVSW

UV multiplex of

–

YUV output

BINO

UV sign of

–

output format

YUVO

select RGB/YUV

–

output format

DTI

UV output format

–

IND

UV output format

–

MOD411ON

UV output format

–

CDEL

select UV output sample from 4:4:4

–

YDEL

adjust Y output delay

–

ADD16Q

black level

–

of Y output

DL422Y

additional

–

Y output delay

DL422C

additional

–

UV output delay

SYNCIN

UV sync control

–

of YUVin

SYNCOUT

UV sync control

–

of YUV output

SYNCSIM

H-sync, V-sync

–

input

D2KSYNC

sync input at

–

FSY-pin

–

AVINT

AVO control

–

PXSKWON

pixel skew corretion

–

P72BEN

72 bit data bypass

–

–––

–

SECAM

delay for SECAM

FBLCLP

static Fast Blank

FBLDEL

delay Fast Blank vs. analog RGB/YUV

FSYINV

polarity FSY

AVOINV

polarity AVO

AVIINV

polarity AVI

–

NEGCLK

select active

clockedge

TESTLUY

test y channel

TESTCHU

test u channel

TESTCHV

test v channel

TESTFBL

test fbl channel

ICLPTST

test fbl clamp

duration

and IDDQ test

PRIOSRC

Source for

PRIO request

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