CIP3250A datasheet(2/44 Pages) MICRONAS

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CIP 3250A

ADVANCE INFORMATION

Micronas

Contents

Page

Section

Title

Introduction

1.1.

Block Diagram

1.2.

System Configurations

Functional Description

2.1.

Analog Front End

2.2.

Clamping

2.3.

Matrix

2.4.

YUV Control (on RGB-path only)

2.5.

Delay Adjustment

2.6.

Skew Filter

2.7.

Fast Blank Processing

2.7.1.

Soft Mixer

2.7.2.

Fast Blank Monitor

2.8.

FSY Front Sync and AVI Active Video In

2.9.

Digital Input Formats

2.9.1.

The Chroma Demultiplexers

2.10.

YUVin Interpolator (LPF 4:4:4)

2.11.

YUV Output Low-pass Filter 4:2:2 and 4:1:1

2.12.

Selectable RGB/YUV Output Formats

2.12.1.

DIGIT 2000 4:1:1 Output Format

2.12.2.

DIGIT 2000 4:2:2 Output Format

2.12.3.

DIGIT 3000 Orthogonal 4:2:2 Output Format

2.12.4.

Orthogonal 4:1:1 Output Format

2.12.5.

YUV Output Levels

2.13.

I/O Code Levels

2.14.

AVO Active Video Output

2.15.

PRIO Interface

2.16.

I2C Serial Bus Control

Specifications

3.1.

Outline Dimensions

3.2.

Pin Connections and Short Descriptions

3.3.

Pin Descriptions

3.4.

Pin Configuration

3.5.

Pin Circuits

3.6.

Electrical Characteristics

3.6.1.

Absolute Maximum Ratings

3.6.2.

Recommended Operating Conditions

3.6.3.

Characteristics

3.6.3.1.

Characteristics Standby Input

3.6.3.2.

Characteristics Test Input

3.6.3.3.

Characteristics Reset Input

3.6.3.4.

Characteristics Main Clock Input

3.6.3.5.

Characteristics Active Video Output

3.6.3.6.

Characteristics Active Video Input

3.6.3.7.

Characteristics Fsync Input

3.6.3.8.

Characteristics I2C Bus Interface Input/Output

3.6.3.9.

Characteristics Luma/Chroma Input

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