MB91F467BA datasheet(38/127 Pages) CYPRESS

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MB91460B Series

Document Number: 002-04608 Rev. *A

Page 37 of 126

8.4.3

CCR (Condition Code Register)

SV: Supervisor flag

S: Stack flag

I: Interrupt enable flag

N: Negative enable flag

Z: Zero flag

V: Overflow flag

C: Carry flag

8.4.4

SCR (System Condition Register)

Flag for step division (D1, D0)

This flag stores interim data during execution of step division.

Step trace trap flag (T)

This flag indicates whether the step trace trap is enabled or disabled.

The step trace trap function is used by emulators. When an emulator is in use, it cannot be used in execution of user programs.

8.4.5

ILM (Interrupt Level Mask Register)

This register stores interrupt level mask values, and the values stored in ILM4 to ILM0 are used for level masking.

The register is initialized to value “01111B” at reset.

8.4.6

PC (Program Counter)

The program counter indicates the address of the instruction that is being executed.

The initial value at reset is undefined.

- 000XXXXB

bit 0

bit 1

bit 2

bit 3

bit 4

bit 5

bit 6

bit 7

Initial value

bit 10

bit 8

bit 9

XX0B

Initial value

bit 18

bit 16

bit 17

ILM2 ILM1 ILM0

01111B

ILM3

ILM4

bit 20 bit 19

Initial value

bit 0

bit 31

XXXXXXXXH

Initial value

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