5238-DS03-405-R datasheet(57/76 Pages) BOARDCOM

57 / 76 page

Advance Data Sheet

BCM5238

1/31/03

Broa d c om Co rp o r a t i o n

Document

5238-DS03-405-R

Auxiliary Mode 4 (PHY 1 of 8) Register (Shadow Register)

Page 49

Shadow Register Enable. Writing a 1 to bit 7 of register 1Fh allows R/W access to the shadow registers located at

addresses 1Ah–1Eh.

AUXILIARY MODE 4 (PHY 1 OF 8) REGISTER (SHADOW REGISTER)

MII LED Select Enable. Default parallel mode configuration of LED1 and LED2 through MII register writes is enabled when

this bit is set to a 1. Otherwise, power-on reset configurations are in effect (for details of all available configurations, see“LED

Display Output Modes” on page 18 ).

AUXILIARY MODE 4 (PHY 2 OF 8) REGISTER (SHADOW REGISTER)

Table 39: Auxiliary Mode 4 (PHY 1 of 8) Register (Shadow Register 26d, 1Ah)

BIt

Name

R/W

Description

Default

15:10

Reserveda

a. When writing to this register, preserve existing values of reserved bits by completing a Read/Modify Write.

–

001100

MII LED Select Enable

R/W

1 = Enable LED output selection through MII register

8:6

Reserveda

––

5:3

Parallel LED2/

Extended LED2 for PHY 1 of

Select[2:0]

R/W

Configuration bits for LED2 output (see “LED Display

Output Modes” on page 18 for details)

2:0

Parallel LED1/

Extended LED1 for PHY 1 of

Select[2:0]

R/W

Configuration bits for LED1 output (see “LED Display

Output Modes” on page 18 for details)

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear

after read operation. Use default values of reserved bit(s) when writing to reserved bit(s). MII shadow register bank 1 is

accessed by setting MII register 1Fh bit 7 to a 1.

Table 40: Auxiliary Mode 4 (PHY 2 of 8) Register (Shadow Register 26d, 1Ah)

BIt

Name

R/W

Description

Default

15:10

Reserveda

–

001100

Serial LED Program Enable

R/W

1 = Enable normal Serial LED programming.

0 = Default Serial LED is active when Serial LED is

enabled (see “LED Display Output

Modes” on page 18 for details)

8:6

Reserveda

––

000

5:3

Serial LED Bank 6/

Extended LED2 for PHY 2 of

Select[2:0]

R/W

Configuration bits for Serial LED Bank 6 and LED2

output for PHY 2 of 8 (see “LED Display Output

Modes” on page 18 for details)

000

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear

after read operation. Use default values of reserved bit(s) when writing to reserved bit(s). MII shadow register bank 1 is

accessed by setting MII register 1Fh bit 7 to a 1.

5238-DS03-405-R Datasheet(PDF) 57 Page - Broadcom Corporation.

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