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CY7C1069G Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY7C1069G Datasheet(HTML) 4 Page - Cypress Semiconductor |
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4 / 20 page ![]() Document Number: 001-81539 Rev. *J Page 4 of 20 CY7C1069G CY7C1069GE Pin Configurations Figure 1. 54-pin TSOP II pinout (Top View) – CY7C1069G [2] Figure 2. 54-pin TSOP II pinout (Top View) – CY7C1069GE [2, 3] 1 2 3 4 5 6 7 8 9 11 14 31 32 36 35 34 33 37 40 39 38 12 13 41 44 43 42 16 15 29 30 NC 18 17 20 19 23 28 25 24 22 21 27 26 VSS NC NC VCC NC I/O6 VSS A16 A17 A11 A12 A13 A14 I/O0 A15 I/O3 I/O5 VCC I/O4 I/O7 A19 A4 A3 A2 A1 CE1 VCC WE CE2 A20 NC VSS OE A8 A7 A6 A5 A0 NC A9 NC A10 10 A18 46 45 47 50 49 48 51 54 53 52 NC I/O1 NC VSS VCC VSS I/O2 NC VCC NC Note 2. NC pins are not connected on the die. 3. ERR is an Output pin. If not used, this pin should be left floating. |
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