STA003T datasheet(7/32 Pages) STMICROELECTRONICS

7 / 32 page

This signal is used as interrupt signal inside

STA003T.

Within a WorldSpace Broadcast Frame, there are

a fixed number of PCM samples, depending on

the nominal audio sampling rate (Fig. 7).

Using this information, with the SRC_INT signal

as external timer source, STA003T performs the

compensation of the audio sampling rate.

The sampling rate control is done by the

STA003T core, by setting PLLFRAC internal reg-

ister. The PLLFRAC value is updated, in steps of

few ppms, by Update PLLFRAC signal.

XTI2DSPCLK

XTI2OCLK

PFD

VCO

Switching

Circuit

OCLK

DCLK

PLLFRAC

PLLFRAC reg

XTI

Disable PLL

PLLCTL_N reg

PLLCTL_M reg

MFSDF(X) reg

Figure 6. PLL and Clocks Generation System

BC Frame Time Lenght:

432 ms

MPEG Frames into 1 BC Frame:

18 for 48 & 24 KHz

12 for 32 & 16 KHz

9 for 12 KHz

6 for 8 KHz

PCM Samples into 1 BC Frame:

20736 for 48 KHz

10368 for 24 KHz

13824 for 32 KHz

6912 for 16 KHz

5184 for 12 KHz

3456 for 8 KHz

SRC_INT

tLOW

tINT

Figure 7. WorldSpace BC Framing

STA003T

7/32

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