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ACT8849 Datasheet(PDF) 25 Page - Active-Semi, Inc

Part # ACT8849
Description  Advanced PMU for Multi-core Application Processors
PDF  35 Pages
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Manufacturer  ACTIVE-SEMI [Active-Semi, Inc]
Direct Link  http://www.active-semi.com
Logo ACTIVE-SEMI - Active-Semi, Inc

ACT8849 Datasheet(HTML) 25 Page - Active-Semi, Inc

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ACT8849
Rev PrB, 12-Jun-14
Innovative PowerTM
- 25 -
www.active-semi.com
Copyright © 2014 Active-Semi, Inc.
Active-Semi Confidential―Do Not Copy or Distribute
ActivePMU
TM is a trademark of Active-Semi.
I2CTM is a trademark of NXP.
The ACT8849 is optimized for the Samsung
Exynos4412 and other application processors,
supporting both the power domains as well as the
signal interface. The following paragraphs describe
how to design ACT8849 with the Exynos4412
processors.
While the ACT8849 supports many possible
configurations for powering these processors, one
of the most common configurations is detailed in
this datasheet. In general, this document refers to
the ACT8849 pin names and functions. However, in
cases where the description of interconnections
between these devices benefits by doing so, both
the ACT8849 pin names and the Exynos4412
processors pin names are provided. When this is
done, the Exynos4412 pin names are located after
the ACT8849 pin names, and are italicized and
located inside parentheses. For example, PWREN
(XPWRRGTON) refers to the logic signal applied to
the ACT8849's PWREN input, identifying that it is
driven from the Exynos4412's XPWRRGTON
output.
SYSTEM CONTROL INFORMATION
Interfacing with the Samsung Exynos4412 processors
Table 1:
ACT8847QM600 + ACT8849QM614 and Exynos4412 Signal Interface
ACT8847
DIRECTION
EXYNOS4412
PWREN
XPWRRGTON
SCL
Xi2cSCL[0]
SDA
Xi2cSDA[0]
VSELR2
DVS_GPIO1
GPIO1/VSELR3
DVS_GPIO2
GPIO2/VSELR4
DVS_GPIO3
nRSTO
XnRESET
nIRQ
XEINT0
nPBSTAT
XEINT1
PWRHLD
XPSHOLD
ACT8849
DIRECTION
EXYNOS4412
PWREN
XPWRRGTON
SCL
Xi2cSCL[0]
SDA
Xi2cSDA[0]
GPIO3/EN4
XMMC0CDN



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