MP8714 – 17V, 10A, SYNCHRONOUS, STEP-DOWN CONVERTER

MP8714 Rev.1.0

www.MonolithicPower.com

13

12/27/2016

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© 2016 MPS. All Rights Reserved.

networkminimizes

the

external

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count and implifies control loop design.

Enable Control (EN/SYNC)

EN/SYNC is a digital control pin that turns the

regulator on and off. Drive EN/SYNC high to

turn on the regulator; drive EN/SYNC low to

turn off the regulator. An internal 6.2µA pull-up

current to a 5V power supply allows for

automatic start-up when EN/SYNC is floating.

EN/SYNC is clamped internally using a 5.7V

series Zener diode (see Figure 4). Connecting

the EN/SYNC input through a pull-up resistor to

the voltage on VIN limits the EN/SYNC input

current to less than 100µA.

For example, with 12V connected to VIN,

Connecting EN/SYNC to a voltage source

directly without a pull-up resistor requires

limiting the amplitude of the voltage source to

≤5.5V to prevent damage to the Zener diode.

Figure 4: 5.7V Zener Diode Connection

For external clock synchronization, connect a

clock with a frequency range between 200kHz

and 2MHz to EN/SYNC. The internal clock

rising edge synchronizes with the external clock

rising edge once the external clock is present.

Set the external clock signal with a pulse width

less than 80% of one internal clock cycle time.

Under-Voltage Lockout (UVLO)

Under-voltage lockout (UVLO) protects the chip

from operating at an insufficient supply voltage.

The MP8714 UVLO comparator monitors the

output voltage of the internal regulator (VCC).

The UVLO rising threshold is about 4.16V,

while its falling threshold is 3.55V.

Soft Start (SS)

The MP8714 employs a soft start (SS)

mechanism to ensure smooth output during

power-up. When EN/SYNC becomes high, an

internal current source (10μA) charges up the

SS capacitor. The SS capacitor voltage takes

over the REF voltage to the PWM comparator.

The output voltage smoothly ramps up with the

SS voltage. Once the SS voltage reaches the

same level as the REF voltage, it continues

comparator. At this point, the soft start finishes

and MP8714 enters into steady-state operation.

The SS capacitor value can be determined with

Equation (1):





 







SS

SS

REF

Tms

I

A

CnF

VV

(1)

If

the

output

capacitors

have

a

large

capacitance value, do not set the SS time to be

too small; otherwise, the current limit can be

easily reached during SS.

Pre-Bias Start-Up

The MP8714 has been designed for monotonic

start-up into a pre-biased output voltage. If the

output is pre-biased to a certain voltage during

start-up, the voltage on the soft-start capacitor

is charged. When the soft-start capacitor’s

voltage exceeds the sensed output voltage at

FB, the part turns on the high-side and low-side

power switches sequentially. The output voltage

begins to ramp up following the soft-start slew

rate.

Power Good (PG) Indicator

The MP8714 uses a power good (PG) output to

indicate whether the output voltage of the

module is ready or not. PG is an open-drain

output. Connect PG to VCC or another voltage

source through a pull-up resistor (e.g.: 100kΩ).

When the input voltage is applied, PG is pulled

PG is pulled high after a 100µs delay. During

When UVLO or OTP occurs, PG is pulled low

immediately. When over-current (OC) occurs,

PG does not respond to an output over-voltage

condition.