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AD6636BBCZ1 Datasheet(PDF) 27 Page - Analog Devices |
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AD6636BBCZ1 Datasheet(HTML) 27 Page - Analog Devices |
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27 / 72 page ![]() AD6636 Rev. 0 | Page 27 of 72 NCO TUNES SIGNAL TO SIGNAL OF INTEREST AFTER FREQUENCY TRANSLATION SIGNAL OF INTEREST SIGNAL OF INTEREST IMAGE SIGNAL OF INTEREST IMAGE –fs/2 –7fs/8 –3fs/8 –5fs/16 –fs/4 –3fs/16 –fs/8 –fs/16 DC fs/16 fs/8 3fs/16 fs/4 5fs/16 3fs/8 7fs/8 fs/2 –fs/2 –7fs/8 –3fs/8 –5fs/16 –fs/4 –3fs/16 –fs/8 –fs/16 DC fs/16 fs/8 3fs/16 fs/4 5fs/16 3fs/8 7fs/8 fs/2 FREQUENCY TRANSLATION (SINGLE 1MHz CHANNEL TUNED TO BASEBAND) WIDEBAND INPUT SPECTRUM (30MHz FROM HIGH SPEED ADC) WIDEBAND INPUT SPECTRUM (–fsamp/2 TO fsamp/2) Figure 30. Frequency Translation Principle Using the NCO and Mixer For example, if the carrier frequency is 100 MHz and the clock frequency is 80 MHz, ( ) 25 . 0 = 80 20 = , mod clk clk ch f f f This, in turn, converts to 0x4000 0000 in the 32-bit twos complement representation for NCO_FREQ. If the carrier frequency is 50 MHz and the clock frequency is 80 MHz, ( ) 125 . 0 = 80 10 = , mod clk clk ch f f f This, in turn, converts to 0xE000 0000 in the twos complement 32-bit representation. Mixer The NCO is accompanied by a mixer. Its operation is similar to an analog mixer. It does the down-conversion of input signals (real or complex) by using the NCO frequency as a local oscillator. For real input signals, this mixer performs a real mixer operation (with two multipliers). For complex input signals, the mixer performs a complex mixer operation (with four multipliers). The mixer adjusts its operation based on the input signal (real or complex) provided to each individual channel. Bypass The NCO and the mixer can be bypassed individually in each channel by writing Logic 1 in the NCO bypass bit in the NCO control register of the channel under consideration. When bypassed, down-conversion is not performed and the AD6636 channel functions simply as a real filter on complex data. This is useful for baseband sampling applications, in which the input Port A (or C) is connected to the I signal path within the filter and the Input Port B (or D) is connected to the Q signal path. This might be desired, if the digitized signal has already been converted to baseband in prior analog stages or by other digital preprocessing. Clear Phase Accumulator on Hop When clear NCO accumulator bit of NCO control register is set (Logic 1), the NCO phase accumulator is cleared prior to a frequency hop. Refer to the Chip Synchronization section for details on frequency hopping. This ensures a consistent phase of the NCO on each hop. The NCO phase offset is unaffected by this setting and is still in effect. If phase-continuous hopping is needed, this bit should be cleared (NCO accumulator is not cleared). The last phase in the NCO phase register is the initiating point for the new frequency. Phase Dither The AD6636 provides a phase dither option for improving the spurious performance of the NCO. Writing Logic 1 in the phase dither enable bit of NCO control register of individual channels enables phase dither. When phase dither is enabled, random phase is added to LSBs of the phase accumulator of the NCO. When phase dither is enabled, spurs due to phase truncation in the NCO are randomized. The energy from these spurs is spread into the noise floor and the spurious free dynamic range is increased at the expense of a very slight decrease in the SNR. The choice of whether to use phase dither in a system is ultimately decided by the system goals. If lower spurs are desired at the expense of a slightly raised noise floor, phase dither should be employed. If a low noise floor is desired and the higher spurs can be tolerated or filtered by subsequent stages, then phase dither is not needed. |
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