LTM4615 datasheet(7/32 Pages) LINER

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LTM4639

4639f

For more information www.linear.com/LTM4639

PIN FUNCTIONS

VIN (A1-A6, B1-B6, C1-C6): Power Input Pins. Apply

input voltage between these and GND pins. Recommend

placing input decoupling capacitance directly between

VIN and GND pins.

VOUT (J1-J10, K1-K11, L1-L11, M1-M11): Power Output

Pins. Apply output load between these and GND pins.

Recommend placing output decoupling capacitance

between these pins and GND pins. Review Table 5. Output

range 0.6V to 5.5V.

GND (C7, C9, D1-D6, D8, E1-E5, E7, E9, F1-F5, F7-F9,

G1-G9, H1-H9): Power Ground Pins for Both Input and

Output.

PGOOD(F11,G12):OutputVoltagePowerGoodIndicator.

Open-drain logic output is pulled to ground when the

output voltage exceeds a ±10% regulation window. Both

pins are tied together internally.

SGND (G11, H11, H12): Signal Ground Pin. Return

ground path for all analog and low power circuitry. Tie a

single connection to the output capacitor GND. See layout

guidelines in Figure 21.

TEMP+ (F6): Temperature Monitor. See Applications In-

formation section.

TEMP– (E6): Kelvin Return of the Internal Temperature

Monitor.

MODE_PLLIN (A8): Forced Continuous Mode, Burst

Mode Operation, or Pulse-Skipping Mode Selection Pin

and External Synchronization Input to Phase Detector Pin.

Connect this pin to INTVCC to enable pulse-skipping mode.

Connect to ground to enable forced continuous mode.

FloatingthispinwillenableBurstModeoperation.Aclockon

this pin will enable synchronization with forced continuous

operation. See the Applications Information section.

CPWR (B7): Control Bias Input. Required to operate the

LTM4639 regulator below 4.5V input. For VIN ≥4.5V up to

7V connect CPWR to VIN. To maintain soft-start function,

sequence VIN before CPWR, then enable the RUN pin. If

the RUN pin has a pull-up resistor to VIN, then sequence

CPWR after VIN.

OT_TEST (B9): Used for Test Purposes. Float this pin, or

tie to VIN to disable overtemperature protection.

fSET (B12): A resistor can be applied from this pin to

ground to set the operating frequency, or a DC voltage

can be applied to set the frequency. See the Applications

Information section.

TRACK/SS (A9): Output Voltage Tracking Pin and Soft-

Start Inputs. The pin has a 1.2µA pull-up current source. A

capacitor from this pin to ground will set a soft-start ramp

rate. In tracking, the regulator output can be tracked to a

differentvoltage.SeetheApplicationsInformationsection.

VFB (F12): The Negative Input of the Error Amplifier.

Internally, this pin is connected to VOUT_LCL with a

60.4k precision resistor. Different output voltages can

be programmed with an additional resistor between VFB

and ground pins. In PolyPhase® operation, tying the

VFB pins together allows for parallel operation. See the

Applications Information section.

COMPA (A11): Current Control Threshold and Error

Amplifier Compensation Point. The current comparator

threshold increases with this control voltage. Tie all

COMP pins together for parallel operation. This pin can

be compensated externally for optimized loop response

or connected to the COMPB pin. See the Applications

Information section.

COMPB (A12): Default Compensation Network

Corresponding to Table 5. Tie this pin to COMPA to use

default compensation. See the Applications Information

section.

RUN(A10):RunControlPin.Avoltageabove1.4Vwillturn

on the module. A 5.1V Zener diode to ground is internal to

the module for limiting the voltage on the RUN pin to 5V

andallowingtheuseofapull-upresistortoVINforenabling

the device. Limit current into the RUN pin to ≤ 2mA.

INTVCC (A7, D9): Internal 5V LDO for Driving the Control

Circuitry and the Power MOSFET Drivers. Both pins are

internally connected. The 5V LDO has a 100mA current

limit. INTVCC is controlled and enabled when RUN is

activated high. See Applications Section. This pin is an

output, do not drive this pin.

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

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