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LTM4646

4646f

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PIN FUNCTIONS

VOUT1 (H1, J1-J2, K1-K2, L1-L2): Power Output Pins.

Apply output load between these pins and GND pins.

Recommend placing output decoupling capacitance

directly between these pins and GND pins. There is a

49.9Ω resistor connected between VOUT1 and VOUTS1 to

protect the output from an open VOUTS1. Review Table 5.

See Note 8 in the Electrical Characteristics section for

output current guideline.

GND (A3, A6-A7, B3, B6-B7, C3-C7, D6-D7, E6, E8, F5,

F7, G6, G8, H6-H7, J4-J7, K3, K6-K7, L3, L6-L7 ): Power

Ground Pins for Both Input and Output Returns.

VOUT2 (A1-A2, B1-B2, C1-C2, D1): Power Output Pins.

Apply output load between these pins and GND pins.

Recommend placing output decoupling capacitance

directly between these pins and GND pins. There is a

49.9Ω resistor connected between VOUT2 and VOUTS2 to

protect the output from an open VOUTS2. Review Table 5.

See Note 8 in the Electrical Characteristics section for

output current guideline.

VOUTS1, VOUTS2 (G2, E2): These pins are connected to

the top of the internal top feedback resistor for each out-

put. Each pin can be directly connected to its specific

output, or connected to the remote sense point of VOUT.

It is important to connect these pins to their designated

outputs for proper regulation.

In paralleling modules, the VOUTS1 pin is left floating, and

the VFB1 pin is connected to INTVCC. This will disable chan-

nel 1’s error amplifier and internally connect COMP1A to

COMP2A. The PGOOD1 and TRACK/SS1 will be disabled

in this mode. Channel 2’s error amplifier will regulate the

two channel single output. See VFB pin description and

Applications Information section.

FREQ (F1): Frequency Set Pin. A resistor from this pin to

SGND sets the operating frequency. The Equation:

41550

f(kHz)

– 2.2 = RFREQ(kΩ)

An external clock applied to MODE_PLLIN should be

within ±30% of this programmed frequency to ensure

frequency lock. See the Applications Information section.

SGND (D3, H3): Signal Ground Pin. Return ground path

for all analog and low power circuitry. Tie a single con-

nection to the output capacitor GND in the application.

See layout guidelines in Figure 17.

VFB1 (G4): This pin is the + input to a unity gain differen-

tial amplifier. This pin is connected to VOUTS1 with a 60.4k

precision resistor internal. Different output voltages can be

programmed with an additional resistor between VFB1 and

VOUTS1– pins. The differential amplifier is feeding back the

divided down output voltage from a remote sense divider

network to compare to the internal 0.6V reference. In 2-phase

single output operation, tie the VFB1 pin to INTVCC. See

Figure1 and Applications Information section for details.

VFB2 (E4): This pin is the + input to a non-inverting gain

of two amplifier utilizing three resistors in the feedback

network to develop a remote sense divider network. This

pin is connected to VOUTS2 with an internal 60.4k preci-

sion resistor. The VOUT2 voltage is divided down to 0.3V

then gained back up to 0.6V to compare with the internal

0.6V reference. This technique provides for equivalent

remote sensing on VOUT2. See Figure 1 and Applications

Information section fordetails.

TRACK/SS1,TRACK/SS2 (H4, F2): Output Voltage Tracking

Pin and Soft-Start Inputs. Each channel has a 1.0A pull-up

current source. Each pin can be programmed with a soft-

start ramp rate up to the 0.6V internal reference level, then

beyond this point the internal 0.6V reference will control the

feedback loop. When one channel is configured to be master

of the two channels, then a capacitor from this pin to ground

will set the soft-start ramp rate. The remaining channel can

be set up as the slave, and have the master’s output applied

through a voltage divider to the slave output’s track pin. This

voltage divider is equal to the slave output’s feedback divider

for coincidental tracking. See the Applications Information

section. (Recommended to use test points to monitor signal

pin connections.)

DRVCC (G7): Internal 5.3V regulator output used to source

the power MOSFET drivers, and supply power to the

INTVCC input. A 4.7µF ceramic capacitor is needed on

this pin to GND.

(Recommended to Use Test Points to Monitor Signal Pin Connections.)

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

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