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HIP2121 Datasheet(PDF) 6 Page - Renesas Technology Corp |
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HIP2121 Datasheet(HTML) 6 Page - Renesas Technology Corp |
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6 / 16 page ![]() HIP2120, HIP2121 FN7668 Rev 0.00 Page 6 of 16 December 23, 2011 Input Voltage Hysteresis VIHYS HIP2120 (CMOS) - 2.2 - -- V Input Pull-down Resistance RI -210 - 100 500 k UNDERVOLTAGE PROTECTION VDD Rising Threshold VDDR 6.8 7.3 7.8 6.5 8.1 V VDD Threshold Hysteresis VDDH -0.6 - -- V HB Rising Threshold VHBR 6.2 6.9 7.5 5.9 7.8 V HB Threshold Hysteresis VHBH -0.6 - -- V BOOTSTRAP DIODE Low Current Forward Voltage VDL IVDD-HB = 100mA - 0.6 0.7 -0.8 V High Current Forward Voltage VDH IVDD-HB = 100mA - 0.7 0.9 -1 V Dynamic Resistance RD IVDD-HB = 100mA - 0.8 1 -1.5 LO GATE DRIVER Low Level Output Voltage VOLL ILO = 100mA - 0.25 0.4 -0.5 V High Level Output Voltage VOHL ILO = -100mA, VOHL = VDD - VLO - 0.25 0.4 -0.5 V Peak Pull-Up Current IOHL VLO = 0V - 2 - -- A Peak Pull-Down Current IOLL VLO = 12V - 2 - -- A HO GATE DRIVER Low Level Output Voltage VOLH IHO = 100mA - 0.25 0.4 -0.5 V High Level Output Voltage VOHH IHO = -100mA, VOHH = VHB - VHO - 0.25 0.4 -0.5 V Peak Pull-Up Current IOHH VHO = 0V - 2 - -- A Peak Pull-Down Current IOLH VHO = 12V - 2 - -- A Electrical Specifications VDD = VHB = 12V, VSS = VHS = 0V, RDT = 0K, PWM = 0V, No Load on LO or HO, Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) PARAMETERS SYMBOL TEST CONDITIONS TA = +25°C TA = -40°C to +125°C UNITS MIN TYP MAX MIN (Note 9) MAX (Note 9) Switching Specifications VDD = VHB = 12V, VSS = VHS = 0V, RDT = 0k, No Load on LO or HO, Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. PARAMETERS SYMBOL TEST CONDITIONS TJ = +25°C TJ = -40°C to +125°C UNITS MIN TYPE MAX MIN (Note 9) MAX (Note 9) HO Turn-Off Propagation Delay PWM Falling to HO Falling tPLHO -32 50 - 60 ns LO Turn-Off Propagation Delay PWM Rising to LO Falling tPLLO -32 50 - 60 ns Minimum Dead-Time Delay (see Note 10) HO Falling to LO Rising tDTHLmin RDT = 80k, PWM 1 to 0 15 35 50 10 60 ns Minimum Dead-Time Delay (see Note 10) LO Falling to HO Rising tDTLHmin RDT = 80k PWM 0 to 1 15 25 50 10 60 ns Maximum Dead-Time Delay (see Note 10) HO Falling to LO Rising tDTHLmax RDT = 8k, PWM 1 to 0 150 220 300 -- ns Maximum Dead-Time Delay (see Note 10) LO Falling to HO Rising tDTLHmax RDT = 8k, PWM 0 to 1 150 220 300 -- ns Either Output Rise/Fall Time (10% to 90%/90% to 10%) tRC,tFC CL = 1nF - 10 - - - ns |
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