ISL8201M

FN6657 Rev 3.00

Page 11 of 16

October 28, 2014

where

voltage, high output voltage application, such as 20V input to

5V output, the inductor ripple becomes excessive due to the

fixed internal inductor value. In such applications, the output

current will be limited from the rating to approximately 70% of

the module’s rated current.

then this can cause almost continuous OCP tripping and retry.

It will also be very sensitive to system noise and in-rush current

spikes, so it should be avoided. The maximum usable setting is

above this might disable the protection. Any voltage drop

point) will disable the OCP. Note that conditions during power-

up or during a retry may look different than normal operation.

During power-up in a 12V system, the ISL8201M starts

operation just above 4V; if the supply ramp is slow, the soft-

start ramp might be over well before 12V is reached.

MOSFET will be higher during power-up, effectively lowering

the OCP trip. In addition, the ripple current will likely be

different at a lower input voltage. Another factor is the digital

nature of the soft-start ramp. On each discrete voltage step,

there is in effect, a small load transient and a current spike to

charge the output capacitors. The height of the current spike is

not controlled, however, it is affected by the step size of the

output and the value of the output capacitors, as well as the

internal error amp compensation. Therefore, it is possible to

trip the overcurrent with in-rush current, in addition to the

normal load and ripple considerations.

Figure 19 shows the output response during a retry of an

off due to sensing an overcurrent condition. There are two

to cool down in order to keep the average power dissipation in

normal soft-start cycle, and the output tries to ramp. If the short

time during the soft-start ramp period, the output will shut off

thus two dummy soft-start cycles plus one variable one (which

depends on how long it takes to trip the sensor each time).

Figure 19 shows an example where the output gets about half-

way up before shutting down; therefore, the retry (or hiccup)

time will be around 17ms. The minimum should be nominally

13.6ms and the maximum 20.4ms. If the short condition is

finally removed, the output should ramp up normally on the

Starting up into a shorted load looks the same as a retry into

that same shorted load. In both cases, OCP is always enabled

during soft-start; once it trips, it will go into retry (hiccup) mode.

The retry cycle will always have two dummy time-outs, plus

whatever fraction of the real soft-start time passes before the

detection and shutoff. At that point, the logic immediately starts

a new two dummy cycle time-out.

Input Voltage Considerations

5V (±10%) or 12V (±20%). In each case, the gate drivers use

not allowed for long-term reliability reasons, but transitions

through it to voltages above 6.5V are acceptable.

There is an internal 5V regulator for bias, which turns on

between 5.5V and 6.5V. Some of the delay after POR is there to

allow a typical power supply to ramp-up past 6.5V before the

soft-start ramps begins. This prevents a disturbance on the

output, due to the internal regulator turning on or off. If the

transition is slow (not a step change), the disturbance should be

minimal. Thus, while the recommendation is to not have the

output enabled during the transition through this region, it may

be acceptable. The user should monitor the output for their

TABLE 2.

(

)

OPEN

13.3

17.3

50k

12.6

16.6

20k

11.4

14.9

10k

10.2

13.3

5k

7.6

10.3

3k

6.3

8.3

2k

4.9

6.7



I

L



2

-------------

+



(EQ. 4)

FIGURE 19. OVERCURRENT RETRY OPERATION