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ISL6521 Datasheet(PDF) 9 Page - Renesas Technology Corp |
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ISL6521 Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 14 page ![]() ISL6521 FN9148 Rev 2.00 Page 9 of 14 Feb 8, 2005 used in parallel with ROCSET (1nF recommended). Upon turn- off of the pull-down device, the switching regulator undergoes a soft-start cycle. To disable a particular linear controller, pull and hold the respective FB pin above a typical threshold of 1.25V. One way to achieve this task is by using a logic gate coupled through a small-signal diode. The diode should be placed as close to the FB pin as possible to minimize stray capacitance to this pin. Upon turn-off of the pull-up device, the respective output undergoes a soft-start cycle, bringing the output within regulation limits. On regulators implementing this feature, the parallel combination of the feedback resistors has to be sufficiently high to allow ease of driving from the external device. Considering the other restriction applying to the upper range of this resistor combination (see ‘Output Voltage Selection’ paragraph), it is recommended the values of the feedback resistors on the linear regulator output meet the following constraint: Important Note When Using External Pass Devices If the collector voltage to a linear regulator pass transistor (Q3, Q4, or Q5 shown in Figure 7) is lost, the respective regulator has to be shut down by pulling high its FB pin. This measure is necessary in order to avoid possible damage to the ISL6521 as a result of overheating. Overheating can occur in such situations due to sheer power dissipation inside the chip’s linear drivers. Layout Considerations MOSFETs switch very fast and efficiently. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency, radiate noise into the circuit, and lead to device overvoltage stress. Careful component layout and printed circuit design minimizes the voltage spikes in the converter. Consider, as an example, the turn-off transition of the upper PWM MOSFET. Prior to turn-off, the upper MOSFET was carrying the full load current. During the turn-off, current stops flowing in the upper MOSFET and is picked up by the lower MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Careful component selection, tight layout of the critical components, and short, wide circuit traces minimize the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using an ISL6521 controller. The switching power components are the most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. The power components and the controller IC should be placed first. Locate the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Locate the output inductor and output capacitors between the MOSFETs and the load. Locate the PWM controller close to the MOSFETs. The critical small signal components include the bypass capacitor for VCC and the feedback resistors. Locate these components close to their connecting pins on the control IC. A multi-layer printed circuit board is recommended. Figure 7 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT each can represent numerous physical capacitors. Dedicate one solid layer for a ground plane and make all critical component ground connections with vias to this layer. Dedicate another solid layer as a power plane and break this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE nodes, but do not unnecessarily oversize these particular islands. Since the PHASE nodes are subjected to very high dv/dt voltages, the stray capacitor formed between these islands and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal wiring. The wiring traces from the control IC to the MOSFET gate and source should be sized to carry 2A peak currents. 2k RS RP RS RP + ---------------------- 5k |
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