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SGM708-RYS8G/TR Datasheet(PDF) 4 Page - SG Micro Corp |
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SGM708-RYS8G/TR Datasheet(HTML) 4 Page - SG Micro Corp |
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4 / 13 page ![]() Low-Cost, Microprocessor SGM708 Supervisory Circuit 4 DECEMBER 2017 SG Micro Corp www.sg-micro.com PIN CONFIGURATION SGM708 (TOP VIEW) SGM708 VCC 1 2 3 4 5 6 7 8 MR GND PFI NC PFO RESET RESET SOIC-8 PIN DESCRIPTION PIN NAME FUNCTION 1 MR Manual-Reset Input triggers a reset pulse when pulled below 0.8V. This active-low input has an internal 250μA (VCC = +5V) pull-up current. It can be driven from a TTL or CMOS logic line as well as shorted to ground with a switch. 2 VCC Power Supply Voltage that is monitored. 3 GND 0V Ground Reference for all signals. 4 PFI Power-Fail Voltage Monitor Input. When PFI is less than 1.25V, PFO goes low. Connect PFI to GND or VCC when not used. 5 PFO Power-Fail Output goes low and sinks current when PFI is less than 1.25V; otherwise PFO stays high. 6 NC No Connect. 7 RESET Active-Low Reset Output pulses low for 200ms when triggered, and stays low whenever VCC is below the reset threshold (4.65V for SGM708-L, 4.40V for SGM708-M, 4.0V for SGM708-J, 3.08V for SGM708-T, 2.93V for SGM708-S and 2.63V for SGM708-R). It remains low for 200ms after VCC rises above the reset threshold or MR goes from low to high. 8 RESET Active-High Reset Output is the inverse of RESET . Whenever RESET is high, RESET is low, and vice versa. |
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