PIC1F628 datasheet(98/170 Pages) MICROCHIP

98 / 170 page

PIC16F62X

DS40300C-page 96

Preliminary

 2003 Microchip Technology Inc.

14.5

Power-on Reset (POR), Power-up

Timer (PWRT), Oscillator Start-up

Timer (OST) and Brown-out Detect

(BOD)

14.5.1

POWER-ON RESET (POR)

The on-chip POR circuit holds the chip in RESET until

DD has reached a high enough level for proper

operation. To take advantage of the POR, just tie the

MCLR pin through a resistor to V

DD. This will eliminate

external RC components usually needed to create

Power-on Reset. A maximum rise time for V

DD is

required. See Electrical Specifications for details.

The POR circuit does not produce an internal RESET

when V

DD declines.

When the device starts normal operation (exits the

RESET condition), device operating parameters (volt-

age, frequency, temperature, etc.) must be met to

ensure operation. If these conditions are not met, the

device must be held in RESET until the operating

conditions are met.

For additional information, refer to Application Note

AN607, “Power-up Trouble Shooting”.

14.5.2

POWER-UP TIMER (PWRT)

The PWRT provides a fixed 72 ms (nominal) timeout

on power-up only, from POR or Brown-out Detect

Reset. The PWRT operates on an internal RC oscilla-

tor. The chip is kept in RESET as long as PWRT is

active. The PWRT delay allows the V

DD to rise to an

acceptable level. A configuration bit, PWRTE can

disable (if set) or enable (if cleared or programmed) the

PWRT. The PWRT should always be enabled when

Brown-out Detect Reset is enabled.

The Power-Up Time delay will vary from chip to chip

and due to V

DD, temperature and process variation.

See DC parameters for details.

14.5.3

OSCILLATOR START-UP TIMER

(OST)

The OST provides a 1024 oscillator cycle (from OSC1

input) delay after the PWRT delay is over. This ensures

that the crystal oscillator or resonator has started and

stabilized.

The OST timeout is invoked only for XT, LP and HS

modes and only on Power-on Reset or wake-up from

SLEEP.

14.5.4

BROWN-OUT DETECT (BOD)

RESET

The PIC16F62X members have on-chip BOD circuitry.

A configuration bit, BODEN, can disable (if clear/

programmed) or enable (if set) the BOD Reset circuitry.

If V

DD falls below VBOD for longer than TBOD, the

brown-out situation will RESET the chip. A RESET is

not guaranteed to occur if V

DD falls below VBOD for

shorter than T

BOD. VBOD and TBOD are defined in

Table 17-1 and Table 17-6, respectively.

On any RESET (Power-on, Brown-out, Watchdog, etc.)

the chip will remain in RESET until V

DD rises above

BOD. The Power-up Timer will now be invoked and will

keep the chip in RESET an additional 72 ms.

If V

DD drops below VBOD while the Power-up Timer is

running, the chip will go back into a Brown-out Detect

Reset and the Power-up Timer will be re-initialized.

Once V

DD rises above VBOD, the Power-Up Timer will

execute a 72 ms RESET. The Power-up Timer should

always be enabled when Brown-out Detect is enabled.

Figure 14-7 shows typical Brown-out situations.

FIGURE 14-7:

BROWN-OUT SITUATIONS

72 MS

BOD

INTERNAL

RESET

BOD

INTERNAL

RESET

72 MS

<72 MS

72 MS

BOD

INTERNAL

RESET

≥ TBOD

PIC1F628 Datasheet(PDF) 98 Page - Microchip Technology

PIC1F628 Datasheet(HTML) 98 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL