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ZL2103ALAF Datasheet(PDF) 24 Page - Renesas Technology Corp |
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ZL2103ALAF Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 28 page ![]() ZL2103 FN6966 Rev 5.00 Page 24 of 28 May 3, 2011 I2C/SMBus Communications The ZL2103 provides an I2C/SMBus digital interface that enables the user to configure all aspects of the device operation as well as monitor the input and output parameters. The ZL2103 can be used with any standard 2-wire I2C host device. In addition, the device is compatible with SMBus version 2.0 and includes an SALRT line to help mitigate bandwidth limitations related to continuous fault monitoring. Pull-up resistors are required on the I2C/SMBus as specified in the SMBus 2.0 specification. The ZL2103 accepts most standard PMBus commands. When controlling the device with PMBus commands, it is recommended that the enable pin is tied to SGND. I2C/SMBus Device Address Selection When communicating with multiple devices using the I2C/SMBus interface, each device must have its own unique address so the host can distinguish between the devices. The device address can be set according to the pin-strap options listed in Table 14. Address values are right-justified. If additional device addresses are required, a resistor can be connected to the SA pin according to Table 15 to provide up to 30 unique device addresses. Digital-DC Bus The Digital-DC Communications (DDC) bus is used to communicate between Zilker Labs Digital-DC devices. This dedicated bus provides the communication channel between devices for features such as sequencing and fault spreading. The DDC pin on all Digital-DC devices in an application should be connected together. A pull-up resistor is required on the DDC bus in order to guarantee the rise time as expressed in Equation 13: Where RPU is the DDC bus pull-up resistance and CLOAD is the bus loading. The pull-up resistor may be tied to VRA or to an external 3.3V or 5V supply as long as this voltage is present prior to or during device power-up. As rules of thumb, each device connected to the DDC bus presents approximately 10pF of capacitive loading, and each inch of FR4 PCB trace introduces approximately 2pF. The ideal design will use a central pull-up resistor that is well matched to the total load capacitance. In power module applications, the user should consider whether to place the pull-up resistor on the module or on the PCB of the end application. The minimum pull-up resistance should be limited to a value that enables any device to assert the bus to a voltage that will ensure a logic 0 (typically 0.8V at the device monitoring point) given the pull-up voltage (5V if tied to VRA) and the pull-down current capability of the ZL2103 (nominally 4mA). TABLE 14. SMBus DEVICE ADDRESS SELECTION SA PIN SETTING SMBus ADDRESS LOW 0x20 OPEN 0x21 HIGH 0x22 (EQ. 13) Rise time RPU = CLOAD 1 s TABLE 15. SMBus ADDRESS VALUES RSA (k ) SMBus Address 10 0x20 11 0x21 12.1 0x22 13.3 0x23 14.7 0x24 16.2 0x25 17.8 0x26 19.6 0x27 21.5 0x28 23.7 0x29 26.1 0x2A 28.7 0x2B 31.6 0x2C 34.8 0x2D 38.3 0x2E 42.2 0x2F 46.4 0x30 51.1 0x31 56.2 0x32 61.9 0x33 68.1 0x34 75 0x35 82.5 0x36 90.9 0x37 100 0x38 110 0x39 121 0x3A 133 0x3B 147 0x3C 162 0x3D |
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