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MSP430F2111IPW Datasheet(PDF) 8 Page - Texas Instruments

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Part # MSP430F2111IPW
Description  MIXED SIGNAL MICROCONTROLLER
PDF  53 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430F2111IPW Datasheet(HTML) 8 Page - Texas Instruments

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MSP430x21x1
MIXED SIGNAL MICROCONTROLLER
SLAS439C − SEPTEMBER 2004 − REVISED JULY 2006
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
memory organization
MSP430F2101
MSP430F2111
MSP430F2121
MSP430F2131
Memory
Main: interrupt vector
Main: code memory
Size
Flash
Flash
1KB Flash
0FFFFh−0FFE0h
0FFFFh−0FC00h
2KB Flash
0FFFFh−0FFE0h
0FFFFh−0F800h
4KB Flash
0FFFFh−0FFE0h
0FFFFh−0F000h
8KB Flash
0FFFFh−0FFE0h
0FFFFh−0E000h
Information memory
Size
Flash
256 Byte
010FFh − 01000h
256 Byte
010FFh − 01000h
256 Byte
010FFh − 01000h
256 Byte
010FFh − 01000h
Boot memory
Size
ROM
1KB
0FFFh − 0C00h
1KB
0FFFh − 0C00h
1KB
0FFFh − 0C00h
1KB
0FFFh − 0C00h
RAM
Size
128 Byte
027Fh − 0200h
128 Byte
027Fh − 0200h
256 Byte
02FFh − 0200h
256 Byte
02FFh − 0200h
Peripherals
16-bit
8-bit
8-bit SFR
01FFh − 0100h
0FFh − 010h
0Fh − 00h
01FFh − 0100h
0FFh − 010h
0Fh − 00h
01FFh − 0100h
0FFh − 010h
0Fh − 00h
01FFh − 0100h
0FFh − 010h
0Fh − 00h
bootstrap loader (BSL)
The MSP430 bootstrap loader (BSL) enables users to program the flash memory or RAM using a UART serial
interface. Access to the MSP430 memory via the BSL is protected by user-defined password. A bootstrap loader
security key is provided at address 0FFDEh to disable the BSL completely or to disable the erasure of the flash
if an invalid password is supplied. For complete description of the features of the BSL and its implementation,
see the Application report Features of the MSP430 Bootstrap Loader, Literature Number SLAA089.
BSLKEY
Description
00000h
Erasure of flash disabled if an invalid password is supplied
0AA55h
BSL disabled
any other value
BSL enabled
BSL Function
DW, PW & DGV Package Pins
RGE Package Pins
Data Transmit
14 - P1.1
14 - P1.1
Data Receive
10 - P2.2
8 - P2.2
flash memory
The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
D Flash memory has n segments of main memory and four segments of information memory (A to D) of 64
bytes each. Each segment in main memory is 512 bytes in size.
D Segments 0 to n may be erased in one step, or each segment may be individually erased.
D Segments A to D can be erased individually, or as a group with segments 0−n.
Segments A to D are also called information memory.
D Segment A contains calibration data. After reset segment A is protected against programming or erasing.
It can be unlocked but care should be taken not to erase this segment if the calibration data is required.



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