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TUSB5052 Datasheet(PDF) 15 Page - Texas Instruments |
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TUSB5052 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 84 page ![]() 3–3 Table 3–1. Controller Pin Description (100-pin TQFP) (Continued) NAME PIN NO. I/O NOTES 3/5V DESCRIPTION 2-RI 77 I (2) UART2: Ring indicator PD[7:0] 75-2, 70-68, 66 I/O (5) Y 1284-port: Data bus SLIN 65 O (5) Y 1284-port: Select input STB 64 O (5) Y 1284-port: Data strobe AFD 63 O (5) Y 1284-port: Auto feed INIT 61 O (5) Y 1284-port: Initialize ACK 60 I (5) Y 1284-port: Acknowledge signal FALT 59 I (5) Y 1284-port: Fault SLCT 58 I (5) Y 1284-port: Select PER 57 I (5) Y 1284-port: Paper end BUSY 56 I (5) Y 1284-port: Busy indication SDA 28 I/O (1)(3) Master I2C controller: data signal SCL 27 O (1)(3) Master I2C controller: clock signal CLKO 97 O (1) Programmable clock output (see GLOBCTL: global control register) WAKEUP 96 I (3) Y Remote wake-up request bit. When low, wakes up system X2 99 O 6-MHz crystal output X1 100 I 6-MHz crystal input or clock input TRST 51 I (3) Test reset input (left open in normal operation) RSTI 29 I (3) Y Controller master reset signal RSTO 30 O (1) Y Reset output (see GLOBCTL: global control register) TEST0 54 I (3) Test inputs (left open in normal operation) TEST1 53 I (3) Test inputs (left open in normal operation) TEST2 52 I (3) Test inputs (left open in normal operation) GND 4 16, 33, 46, 62, 71, 86, 98 GND Digital ground VCC 7, 13, 36, 67, 88 PWR 3.3V VCCs 38, 55, 76 PWR 5V NOTES: 1. 3-state CMOS output ( ±4 mA drive/sink) 2. Schmidt-trigger input 3. Schmidt-trigger input, with internal 100 µA active pullup 4. Unused downstream ports should tie to ground through 15-k Ω pulldown resisters. 5. IEEE 1284 compliant port |
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