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ISD9130CFI Datasheet(PDF) 2 Page - Nuvoton Technology Corporation |
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ISD9130CFI Datasheet(HTML) 2 Page - Nuvoton Technology Corporation |
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2 / 415 page ![]() ISD9160 Technical Reference Manual Release Date: Mar 30, 2016 - 2 - Revision V1.41 Table of Contents- TABLE OF CONTENTS-.................................................................................................................. 2 1 GENERAL DESCRIPTION ..................................................................................................... 6 2 FEATURES ............................................................................................................................. 7 3 PART INFORMATION AND PIN CONFIGURATION ........................................................... 10 3.1 Pin Configuration........................................................................................................ 10 3.1.1 ISD9160 LQFP 48 pin ....................................................................................................10 3.1.2 Pin Description ...............................................................................................................10 4 BLOCK DIAGRAM ................................................................................................................ 15 5 FUNCTIONAL DESCRIPTION.............................................................................................. 16 5.1 ARM ® Cortex™-M0 core ............................................................................................ 16 5.2 System Manager ........................................................................................................ 17 5.2.1 Overview ........................................................................................................................17 5.2.2 System Reset .................................................................................................................17 5.2.3 System Power Distribution .............................................................................................18 5.2.4 System Memory Map......................................................................................................19 5.2.5 System Manager Control Registers................................................................................21 5.2.6 System Timer (SysTick) .................................................................................................39 5.2.7 Nested Vectored Interrupt Controller (NVIC) ..................................................................43 5.2.8 System Control Registers...............................................................................................83 5.3 Clock Controller and Power Management Unit (PMU) .............................................. 90 5.3.1 Clock Generator .............................................................................................................90 5.3.2 System Clock & SysTick Clock.......................................................................................91 5.3.3 Peripheral Clocks ...........................................................................................................92 5.3.4 Power Management .......................................................................................................92 5.3.5 Clock Control Register Map............................................................................................93 5.3.6 Clock Control Register Description.................................................................................95 5.4 General Purpose I/O ................................................................................................ 111 5.4.1 Overview and Features ................................................................................................111 5.4.2 GPIO I/O Modes ...........................................................................................................111 5.4.3 GPIO Control Register Map..........................................................................................113 5.4.4 GPIO Control Register Description...............................................................................114 5.5 Brownout Detection and Temperature Alarm........................................................... 124 5.5.1 Brownout and Temperature Alarm Register Map .........................................................124 5.6 I2C Serial Interface Controller (Master/Slave) ......................................................... 129 5.6.1 Introduction...................................................................................................................129 5.6.2 I2C Protocol Registers..................................................................................................134 5.6.3 Register Mapping .........................................................................................................137 5.6.4 Register Description .....................................................................................................138 5.6.5 Modes of Operation ......................................................................................................145 5.6.6 Data Transfer Flow in Five Operating Modes ...............................................................146 5.7 PWM Generator and Capture Timer ........................................................................ 152 5.7.1 Introduction...................................................................................................................152 5.7.2 Features .......................................................................................................................153 5.7.3 PWM Generator Architecture .......................................................................................154 5.7.4 PWM-Timer Operation..................................................................................................154 |
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