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GPC3XXXAX Datasheet(PDF) 8 Page - Generalplus Technology Inc. |
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GPC3XXXAX Datasheet(HTML) 8 Page - Generalplus Technology Inc. |
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8 / 41 page ![]() GPC3XXXAx/Bx/Cx/Dx © Generalplus Technology Inc. Proprietary & Confidential 8 Aug. 28, 2017 Version: 2.3 6.2. Signal Descriptions for GPC3341A PIN Name Type Description IO Port IOA[7:0] I/O Bi-directional I/O port, can be software programmed as a wake-up I/O. 1Mohm || 100K feedback Pull Low resistor IOA7 shares its pad with IR Output, IOA3 shares its pad with SDA in serial programming cycle. IOA2 shares its pad with SCK in serial programming cycle. IOA1 shares its pad with External Clock Input. IOA0 shares its pad with External Interrupt Input. IOB[7:0] I/O Bi-directional I/O port, can be software programmed as a wake-up I/O. 1Mohm || 100K feedback Pull Low resistor. IOB5 shares its pad with XTAL 32KHz Input. IOB4 shares its pad with XTAL 32KHz Output. IOB[3:0] shares its pad with 256-level PWM Output, high sink current. IOC[7:0] I/O Bi-directional I/O port, can be software programmed as a wake-up I/O. 1Mohm || 100K feedback Pull Low resistor Power & Ground PAD VDD_REGOUT O Regulator output pin VDD_REGIN P Regulator input pin CVSS G Ground reference VPP P High voltage during programming, NC at the normal run VDDIO P Power supply voltage input VSSIO G Ground reference PVDD P PWM driver power PVSS G PWM driver ground reference Others RESB I System reset input, low active with pull-high EPM I Program control pin, NC at the normal run TEST I Test pin input, high active (with pull low) and please DON’T bond the TEST pin. NC I DON’T bond the NC pin. AUDP, AUDN O PWM audio output Total: 38 Pins Legend: I = Input O = Output P = Power G = Ground Note1: To ensure that the IC is functioned properly, please bond all VDD and VSS pins. Note2: VDD_REGIN should be equal to VDDIO. Note3: PVDD should be higher than or equal to VDD_REGIN & VDDIO. Note4: please DON’T bond NC pin. Note5: please DON’T bond TEST pin. |
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