IP178G datasheet(3/76 Pages) ETC2

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IP178G

Data Sheet

3 / 76

December 19, 2012

IP178G-DS-R01.3

4.12.1

Supports link LED only.............................................................................................31

4.12.2

Supports link, speed, and duplex LED.....................................................................32

4.13

LED Blink Timing...................................................................................................................32

4.14

PAD Driving Calibration ........................................................................................................33

4.15

Fiber port configuration .........................................................................................................33

Register descriptions.............................................................................................................................................. 34

5.1

Register map.........................................................................................................................34

5.1.1

MII register map .......................................................................................................34

PHY registers.......................................................................................................................................................... 35

6.1

MII Register...........................................................................................................................36

6.2

MMD Control Register ..........................................................................................................43

6.3

MMD Data Register ..............................................................................................................44

6.4

LED mode Control Register ..................................................................................................47

6.5

WOL+ Control Register.........................................................................................................48

6.6

6.7

Switch control registers (I) ....................................................................................................50

6.8

Test mode control registers...................................................................................................51

6.9

Port mirroring control registers..............................................................................................52

6.10

Debug Regiister ....................................................................................................................52

6.11

Fiber duplex setting registers................................................................................................53

6.12

Backpressure setting registers..............................................................................................53

6.13

TCP/UDP port priority registers ............................................................................................54

6.14

Test mode..............................................................................................................................54

6.15

CoS control registers – port 0 ...............................................................................................55

6.16

CoS control registers – port 1 ...............................................................................................55

6.17

CoS control registers – port 2 ...............................................................................................55

6.18

CoS control registers – port 3 ...............................................................................................55

6.19

CoS control registers – port 4 ...............................................................................................56

6.20

CoS control registers – port 5 ...............................................................................................56

6.21

CoS control registers – port 6 ...............................................................................................56

6.22

CoS control registers – port 7 ...............................................................................................56

6.23

Switch control registers (IV) ..................................................................................................57

6.24

Reserved Group MAC addresses .........................................................................................58

6.25

Switch control registers (V) ...................................................................................................62

6.26

EEE Timing Parameter .........................................................................................................62

6.27

WOL (Wake on LAN).............................................................................................................63

6.28

Link Aggregation ...................................................................................................................64

6.29

VLAN Group Control Register...............................................................................................64

6.29.1

VLAN Classification .................................................................................................64

6.29.2

VLAN Ingress Rule ..................................................................................................65

6.29.3

Default VLAN Information ........................................................................................66

6.29.4

VLAN TAG Control Register ....................................................................................66

6.29.5

Port Based VLAN Member Register ........................................................................66

6.29.6

Leaky VLAN Control Register ..................................................................................67

6.30

VLAN Table ...........................................................................................................................67

6.30.1

VLAN Control Register.............................................................................................67

6.30.2

VLAN Identifier Register ..........................................................................................67

6.30.3

VLAN Member Register ...........................................................................................68

Electrical Characteristics ........................................................................................................................................ 70

7.1

Absolute Maximum Rating ....................................................................................................70

7.2

Crystal Specifications ............................................................................................................70

7.3

DC Characteristic ..................................................................................................................70

7.3.1

Operating Conditions ...............................................................................................70

7.3.2

Input Clock ...............................................................................................................70

7.3.3

I/O Electrical Characteristics....................................................................................71

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