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CY2287PVC-1 Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY2287PVC-1
Description  100-MHz Spread Spectrum Clock Synthesizer/Driver with USB, Hublink, and SDRAM Support
PDF  13 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2287PVC-1 Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY2287
4
Serial Configuration Map
• The Serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Reserved and unused bits must be programmed to “0”.
• I2C Address for the CY2287 is:
A6
A5
A4
A3
A2
A1
A0
R/W
11010010
Byte 0: Spread Spectrum, USB, SDRAM8
Control Register
(1 = Enable, 0 = Disable)
Default = Enable (for Bit [0:2])
Default = Disable (for Bit [3:7])
Bit
Pin #
Description
Bit 7 --
Reserved
Bit 6 --
Reserved
Bit 5 --
Reserved
Bit4
--
SEL2
Bit3
--
Spread Spectrum (Default = Disable)
Bit2
26
USB1
Bit1
25
USB0
Bit0
49
CPU2
Byte 1: SDRAM Control Register
(1 = Enable, 0 = Disable)
Default = Enable
Bit
Pin #
Description
Bit 7
36
SDRAM7
Bit 6
37
SDRAM6
Bit 5
39
SDRAM5
Bit 4
40
SDRAM4
Bit 3
42
SDRAM3
Bit 2
43
SDRAM2
Bit 1
45
SDRAM1
Bit 0
46
SDRAM0
Byte 2: PCI Control Register
(1 = Enable, 0 = Disable)
Default = Enable (for Bit [1:7])
Default = Disable (for Bit 0)
Bit
Pin #
Description
Bit 7
20
PCI7
Bit 6
19
PCI6
Bit 5
18
PCI5
Bit 4
16
PCI4
Bit 3
15
PCI3
Bit 2
13
PCI2
Bit 1
12
PCI1
Bit 0
11
Reserved
Byte 3: Peripheral Control Register
(0 = Enable, 1 = Disable)
Default = Enable
Bit
Pin #
Description
Bit 7
8
3V66_1
Bit 6
7
3V66_0
Bit 5
11
PCI0
Bit 4
34
SDRAM8
Bit 3
54
APIC1
Bit 2
55
APIC0
Bit 1
50
CPU1
Bit 0
52
CPU0
Byte 4: Reserved Register
(0 = Enable, 1 = Disable)
Default = Disable
Bit
Pin #
Description
Bit 7
--
Reserved
Bit 6
--
Reserved
Bit 5
--
Reserved
Bit 4
--
Reserved
Bit 3
--
Reserved
Bit 2
--
Reserved
Bit 1
--
Reserved
Bit 0
--
Reserved



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