FN3297 Rev 0.00

Page 1 of 10

August 1998

FN3297

Rev 0.00

August 1998

CD4017BMS, CD4022BMS

CMOS Counter/Dividers

DATASHEET

CD4017BMS and CD4022BMS are 5-stage and 4-stage John-

son counters having 10 and 8 decoded outputs, respectively.

Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT sig-

nal. Schmitt trigger action in the CLOCK input circuit provides

pulse shaping that allows unlimited clock input pulse rise and fall

times.

These counters are advanced one count at the positive clock sig-

nal transition if the CLOCK INHIBIT signal is low. Counter

advancement via the clock line is inhibited when the CLOCK

INHIBIT signal is high. A high RESET signal clears the counter to

its zero count. Use of the Johnson counter configuration permits

high speed operation, 2-input decode gating and spike-free

decoded outputs. Anti-lock gating is provided, thus assuring

proper counter sequence. The decoded output are normally low

and go high only at their respective decoded time slot. Each

decoded output remains high for one full clock cycle. A CARRY-

OUT signal completes one cycle every 10 clock input cycles in

the CD4017BMS or every 8 clock input cycles in the

CD4022BMS and is used to ripple-clock the succeeding device

in a multi-device counting chain.

The CD4017BMS and CD4022BMS series types are supplied in

these 16 lead outline packages

Features

• High Voltage Types (20V Rating)

• Fully Static Operation

• Medium-Speed Operation 10MHz (Typ) at VDD = 10V

• Standardized Symmetrical Output Characteristics

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

• Meets All Requirements of JEDEC Tentative Standard

Number 13A, “Standard Specifications for Description

of ‘B’ Series CMOS Devices”

Applications

• Decade Counter/Decimal Decode Display (CD4017BMS)

• Binary Counter/Decoder

• Frequency Division

• Counter Control/Timers

• Divide-by-N Counting

• For Further Application Information, See ICAN-6166

“COS/MOS MSI Counter and Register Design and

Applications”

CD4017BMS - Decade Counter with 10 Decoded Outputs

CD4022BMS - Octal Counter with 8 Decoded Outputs

Braze Seal DIP

*H4W

†H4X

Frit Seal DIP

*H1F

†H1E

Ceramic Flatpack

H6W

*CD4017B Only

† CD4022B Only

Functional Diagrams

CD4017BMS

CD4022BMS

3

2

4

7

10

1

5

6

9

“0”

“1”

“2”

“3”

“4”

“5”

“6”

“7”

CARRY OUT

DECODED

DECIMAL

14

13

15

CLOCK

CLOCK INHIBIT

RESET

VCC = 16

VSS = 8

11

12

“8”

“9”

OUT

2

1

3

7

11

4

5

10

12

“0”

“1”

“2”

“3”

“4”

“5”

“6”

“7”

CARRY OUT

DECODED

OUT

14

13

15

CLOCK

CLOCK INHIBIT

RESET

VCC = 16

VSS = 8

Pinouts

CD4017BMS

TOP VIEW

CD4022BMS

TOP VIEW

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

5

1

0

2

6

7

VSS

3

VDD

CLOCK

CLOCK INHIBIT

CARRY OUT

9

4

8

RESET

NC = NO

CONNECTION

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

1

0

2

5

6

NC

VSS

3

VDD

CLOCK

CLOCK INHIBIT

CARRY OUT

4

7

NC

RESET

NC = NO

CONNECTION