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PIC18F44800TE/ML Datasheet(PDF) 227 Page - Microchip Technology

Part # PIC18F44800TE/ML
Description  28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PDF  484 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F44800TE/ML Datasheet(HTML) 227 Page - Microchip Technology

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 2004 Microchip Technology Inc.
Preliminary
DS39637A-page 225
PIC18F2480/2580/4480/4580
17.4.17.3
Bus Collision During a Stop
Condition
Bus collision occurs during a Stop condition if:
a)
After the SDA pin has been deasserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
b)
After the SCL pin is deasserted, SCL is sampled
low before SDA goes high.
The Stop condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 17-31). If the SCL pin is
sampled low before SDA is allowed to float high, a bus
collision occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 17-32).
FIGURE 17-31:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
FIGURE 17-32:
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDA
SCL
BCLIF
PEN
P
SSPIF
TBRG
TBRG
TBRG
SDA asserted low
SDA sampled
low after TBRG,
set BCLIF
‘0’
‘0’
SDA
SCL
BCLIF
PEN
P
SSPIF
TBRG
TBRG
TBRG
Assert SDA
SCL goes low before SDA goes high,
set BCLIF
‘0’
‘0’



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