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PIC18F44800TE/ML Datasheet(PDF) 53 Page - Microchip Technology |
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PIC18F44800TE/ML Datasheet(HTML) 53 Page - Microchip Technology |
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53 / 484 page  2004 Microchip Technology Inc. Preliminary DS39637A-page 51 PIC18F2480/2580/4480/4580 CCPR1H 2480 2580 4480 4580 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1L 2480 2580 4480 4580 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON 2480 2580 4480 4580 --00 0000 --00 0000 --uu uuuu ECCPR1H 2480 2580 4480 4580 xxxx xxxx uuuu uuuu uuuu uuuu ECCPR1L 2480 2580 4480 4580 xxxx xxxx uuuu uuuu uuuu uuuu ECCP1CON 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu BAUDCON 2480 2580 4480 4580 01-0 0-00 01-0 0-00 --uu uuuu ECCP1DEL 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu ECCP1AS 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu CVRCON 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu CMCON 2480 2580 4480 4580 0000 0111 0000 0111 uuuu uuuu TMR3H 2480 2580 4480 4580 xxxx xxxx uuuu uuuu uuuu uuuu TMR3L 2480 2580 4480 4580 xxxx xxxx uuuu uuuu uuuu uuuu T3CON 2480 2580 4480 4580 0000 0000 uuuu uuuu uuuu uuuu SPBRGH 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu SPBRG 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu RCREG 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu TXREG 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu TXSTA 2480 2580 4480 4580 0000 0010 0000 0010 uuuu uuuu RCSTA 2480 2580 4480 4580 0000 000x 0000 000x uuuu uuuu EEADR 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu EEDATA 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu EECON2 2480 2580 4480 4580 0000 0000 0000 0000 0000 0000 EECON1 2480 2580 4480 4580 xx-0 x000 uu-0 u000 uu-0 u000 IPR3 2480 2580 4480 4580 1111 1111 1111 1111 uuuu uuuu PIR3 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu PIE3 2480 2580 4480 4580 0000 0000 0000 0000 uuuu uuuu IPR2 2480 2580 4480 4580 11-1 1111 11-1 1111 uu-u uuuu 2480 2580 4480 4580 1--1 111- 1--1 111- u--u uuu- PIR2 2480 2580 4480 4580 00-0 0000 00-0 0000 uu-u uuuu(1) 2480 2580 4480 4580 0--0 000- 0--0 000- u--u uuu-(1) TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets, WDT Reset, RESET Instruction, Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 4: See Table 4-3 for Reset value for specific condition. 5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as PORTA pins, they are disabled and read ‘0’. 6: This register reads all ‘0’s until ECAN™ technology is set up in Mode 1 or Mode 2. |
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