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BUL44D2 Datasheet(PDF) 9 Page - ON Semiconductor

Part # BUL44D2
Description  POWER TRANSISTORS 2 AMPERES 700 VOLTS 50 WATTS
PDF  12 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

BUL44D2 Datasheet(HTML) 9 Page - ON Semiconductor

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BUL44D2
9
Motorola Bipolar Power Transistor Device Data
SECOND BREAKDOWN
DERATING
THERMAL DERATING
Figure 23. Forward Bias Safe Operating Area
10
0.01
1000
10
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 24. Reverse Bias Safe Operating Area
2.5
1
0
900
200
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
100
1
0.1
DC
5 ms
1 ms
10
µs
1
µs
0.5
0 V
–1.5 V
– 5 V
TC ≤ 125°C
GAIN
≥ 4
LC = 500 µH
300
400
700
600
2
1.5
TYPICAL CHARACTERISTICS
500
800
Figure 25. Forward Bias Power Derating
1
0
160
100
20
TC, CASE TEMPERATURE (°C)
0.8
0.6
0.4
0.2
60
140
40
80
120
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate IC –VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate. The data of Figure 23 is based
on TC = 25°C; TJ(pk) is variable depending on power level.
Second breakdown pulse limits are valid for duty cycles to
10% but must be derated when TC > 25°C. Second
breakdown limitations do not derate the same as thermal
limitations. Allowable current at the voltages shown on
Figure 23 may be found at any case temperature by using
the appropriate curve on Figure 25.
TJ(pk) may be calculated from the data in Figure 26. At any
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations
imposed by second breakdown. For inductive loads, high
voltage and current must be sustained simultaneously during
turn–off with the base to emitter junction reverse biased. The
safe level is specified as a reverse biased safe operating
area (Figure 24). This rating is verified under clamped
conditions so that the device is never subjected to an
avalanche mode.



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